Search

Troy Chambers

Supervisory Patent Examiner (ID: 10357, Phone: (571)272-6874 , Office: P/3641 )

Most Active Art Unit
3641
Art Unit(s)
3658, 3641
Total Applications
1158
Issued Applications
719
Pending Applications
123
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7673693 [patent_doc_number] => 20040128425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Using chip select to specify boot memory' [patent_app_type] => new [patent_app_number] => 10/329904 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5495 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20040128425.pdf [firstpage_image] =>[orig_patent_app_number] => 10329904 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329904
Using chip select to specify boot memory Dec 25, 2002 Issued
Array ( [id] => 773862 [patent_doc_number] => 07007044 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-28 [patent_title] => 'Storage backup system for backing up data written to a primary storage device to multiple virtual mirrors using a reconciliation process that reflects the changing state of the primary storage device over time' [patent_app_type] => utility [patent_app_number] => 10/330968 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5839 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/007/07007044.pdf [firstpage_image] =>[orig_patent_app_number] => 10330968 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330968
Storage backup system for backing up data written to a primary storage device to multiple virtual mirrors using a reconciliation process that reflects the changing state of the primary storage device over time Dec 25, 2002 Issued
Array ( [id] => 7340554 [patent_doc_number] => 20040133575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Scheduled creation of point-in-time views' [patent_app_type] => new [patent_app_number] => 10/329199 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4457 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20040133575.pdf [firstpage_image] =>[orig_patent_app_number] => 10329199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329199
Storage backup system that creates mountable representations of past contents of storage volumes Dec 22, 2002 Issued
Array ( [id] => 554104 [patent_doc_number] => 07164610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'Microcomputer having a flush memory that can be temporarily interrupted during an erase process' [patent_app_type] => utility [patent_app_number] => 10/323771 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 10498 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/164/07164610.pdf [firstpage_image] =>[orig_patent_app_number] => 10323771 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323771
Microcomputer having a flush memory that can be temporarily interrupted during an erase process Dec 19, 2002 Issued
Array ( [id] => 6647889 [patent_doc_number] => 20030212896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'User interface for accessing files in a smartcard file' [patent_app_type] => new [patent_app_number] => 10/321507 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 36653 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20030212896.pdf [firstpage_image] =>[orig_patent_app_number] => 10321507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/321507
User interface for accessing files in a smartcard file Dec 17, 2002 Abandoned
Array ( [id] => 1248824 [patent_doc_number] => 06678786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-13 [patent_title] => 'Timing execution of compare instructions in a synchronous content addressable memory' [patent_app_type] => B2 [patent_app_number] => 10/318251 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8351 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678786.pdf [firstpage_image] =>[orig_patent_app_number] => 10318251 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318251
Timing execution of compare instructions in a synchronous content addressable memory Dec 10, 2002 Issued
Array ( [id] => 6685007 [patent_doc_number] => 20030120871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Storage apparatus and input/output control method for the storage apparatus' [patent_app_type] => new [patent_app_number] => 10/309847 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 24867 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20030120871.pdf [firstpage_image] =>[orig_patent_app_number] => 10309847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/309847
Storage apparatus and input/output control method for the storage apparatus Dec 3, 2002 Abandoned
Array ( [id] => 6655426 [patent_doc_number] => 20030105925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Content distribution system, description data distribution apparatus, content location management apparatus, data conversion apparatus, reception terminal apparatus, and content distribution method' [patent_app_type] => new [patent_app_number] => 10/305987 [patent_app_country] => US [patent_app_date] => 2002-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 32368 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105925.pdf [firstpage_image] =>[orig_patent_app_number] => 10305987 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305987
Method and apparatus for distributing content data over a network Nov 28, 2002 Issued
Array ( [id] => 949480 [patent_doc_number] => 06963516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-08 [patent_title] => 'Dynamic optimization of latency and bandwidth on DRAM interfaces' [patent_app_type] => utility [patent_app_number] => 10/306142 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4389 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/963/06963516.pdf [firstpage_image] =>[orig_patent_app_number] => 10306142 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306142
Dynamic optimization of latency and bandwidth on DRAM interfaces Nov 26, 2002 Issued
Array ( [id] => 1066638 [patent_doc_number] => 06850999 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-01 [patent_title] => 'Coherency coverage of data across multiple packets varying in sizes' [patent_app_type] => utility [patent_app_number] => 10/306009 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7339 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850999.pdf [firstpage_image] =>[orig_patent_app_number] => 10306009 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306009
Coherency coverage of data across multiple packets varying in sizes Nov 26, 2002 Issued
Array ( [id] => 6806124 [patent_doc_number] => 20030233518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Method and apparatus for managing replication volumes' [patent_app_type] => new [patent_app_number] => 10/305714 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20030233518.pdf [firstpage_image] =>[orig_patent_app_number] => 10305714 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305714
Method and apparatus for managing replication volumes Nov 26, 2002 Issued
Array ( [id] => 491042 [patent_doc_number] => 07222369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Role-based portal to a workplace system' [patent_app_type] => utility [patent_app_number] => 10/306894 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5240 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/222/07222369.pdf [firstpage_image] =>[orig_patent_app_number] => 10306894 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306894
Role-based portal to a workplace system Nov 26, 2002 Issued
Array ( [id] => 981630 [patent_doc_number] => 06931507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Memory allocation method using multi-level partition' [patent_app_type] => utility [patent_app_number] => 10/307101 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4452 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931507.pdf [firstpage_image] =>[orig_patent_app_number] => 10307101 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307101
Memory allocation method using multi-level partition Nov 26, 2002 Issued
Array ( [id] => 771370 [patent_doc_number] => 07010662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Dynamic data structures for tracking file system free space in a flash memory device' [patent_app_type] => utility [patent_app_number] => 10/301800 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 13552 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010662.pdf [firstpage_image] =>[orig_patent_app_number] => 10301800 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301800
Dynamic data structures for tracking file system free space in a flash memory device Nov 20, 2002 Issued
Array ( [id] => 6707489 [patent_doc_number] => 20030154223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Continuous multi-buffering random number generator' [patent_app_type] => new [patent_app_number] => 10/300932 [patent_app_country] => US [patent_app_date] => 2002-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 16615 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154223.pdf [firstpage_image] =>[orig_patent_app_number] => 10300932 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300932
Continuous multi-buffering random number generator Nov 19, 2002 Issued
Array ( [id] => 582276 [patent_doc_number] => 07159124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Non-volatile semiconductor memory that prevents unauthorized reading' [patent_app_type] => utility [patent_app_number] => 10/298512 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/159/07159124.pdf [firstpage_image] =>[orig_patent_app_number] => 10298512 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/298512
Non-volatile semiconductor memory that prevents unauthorized reading Nov 18, 2002 Issued
Array ( [id] => 7476936 [patent_doc_number] => 20040098535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Method and apparatus for header splitting/splicing and automating recovery of transmit resources on a per-transmit granularity' [patent_app_type] => new [patent_app_number] => 10/300709 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7827 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20040098535.pdf [firstpage_image] =>[orig_patent_app_number] => 10300709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300709
Method and apparatus for header splitting/splicing and automating recovery of transmit resources on a per-transmit granularity Nov 18, 2002 Issued
Array ( [id] => 6793401 [patent_doc_number] => 20030088745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Data storage device and data erasing method' [patent_app_type] => new [patent_app_number] => 10/284257 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2976 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088745.pdf [firstpage_image] =>[orig_patent_app_number] => 10284257 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284257
Data storage device and method of erasing data stored in the data storage device Oct 30, 2002 Issued
Array ( [id] => 7214698 [patent_doc_number] => 20040088514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Methods and systems for a storage system including an improved switch' [patent_app_type] => new [patent_app_number] => 10/284278 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17318 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088514.pdf [firstpage_image] =>[orig_patent_app_number] => 10284278 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284278
Methods and systems for a storage system with a program-controlled switch for routing data Oct 30, 2002 Issued
Array ( [id] => 508015 [patent_doc_number] => 07209996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Multi-core multi-thread processor' [patent_app_type] => utility [patent_app_number] => 10/272786 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4205 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209996.pdf [firstpage_image] =>[orig_patent_app_number] => 10272786 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272786
Multi-core multi-thread processor Oct 15, 2002 Issued
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