Search

Troy Chambers

Supervisory Patent Examiner (ID: 10357, Phone: (571)272-6874 , Office: P/3641 )

Most Active Art Unit
3641
Art Unit(s)
3658, 3641
Total Applications
1158
Issued Applications
719
Pending Applications
123
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6844481 [patent_doc_number] => 20030149828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Extended upper memory block memory manager' [patent_app_type] => new [patent_app_number] => 10/057861 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2867 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149828.pdf [firstpage_image] =>[orig_patent_app_number] => 10057861 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/057861
Extended upper memory block memory manager Jan 23, 2002 Issued
Array ( [id] => 7605716 [patent_doc_number] => 07100006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Method and mechanism for generating a live snapshot in a computing system' [patent_app_type] => utility [patent_app_number] => 10/051498 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5080 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/100/07100006.pdf [firstpage_image] =>[orig_patent_app_number] => 10051498 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051498
Method and mechanism for generating a live snapshot in a computing system Jan 17, 2002 Issued
Array ( [id] => 6857697 [patent_doc_number] => 20030131198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Queue array caching in network devices' [patent_app_type] => new [patent_app_number] => 10/041678 [patent_app_country] => US [patent_app_date] => 2002-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1488 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131198.pdf [firstpage_image] =>[orig_patent_app_number] => 10041678 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/041678
Queue array caching in network devices Jan 6, 2002 Issued
Array ( [id] => 1204987 [patent_doc_number] => 06721317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Switch-based scalable performance computer memory architecture' [patent_app_type] => B2 [patent_app_number] => 10/039141 [patent_app_country] => US [patent_app_date] => 2002-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 15722 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721317.pdf [firstpage_image] =>[orig_patent_app_number] => 10039141 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039141
Switch-based scalable performance computer memory architecture Jan 1, 2002 Issued
Array ( [id] => 675994 [patent_doc_number] => 07093096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Optimised management method for allocating memory workspace of an onboard system and corresponding onboard system' [patent_app_type] => utility [patent_app_number] => 10/472323 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6011 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/093/07093096.pdf [firstpage_image] =>[orig_patent_app_number] => 10472323 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/472323
Optimised management method for allocating memory workspace of an onboard system and corresponding onboard system Dec 19, 2001 Issued
Array ( [id] => 6606582 [patent_doc_number] => 20020042861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Apparatus and method for implementing a variable block size cache' [patent_app_type] => new [patent_app_number] => 10/015099 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4328 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20020042861.pdf [firstpage_image] =>[orig_patent_app_number] => 10015099 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/015099
Apparatus and method for implementing a variable block size cache Dec 10, 2001 Abandoned
Array ( [id] => 6698039 [patent_doc_number] => 20030110233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Reflective memory system and method capable of dynamically sizing data packets' [patent_app_type] => new [patent_app_number] => 10/013324 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10402 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110233.pdf [firstpage_image] =>[orig_patent_app_number] => 10013324 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013324
Reflective memory system and method capable of dynamically sizing data packets Dec 9, 2001 Abandoned
Array ( [id] => 6632037 [patent_doc_number] => 20020065984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'Method and apparatus for zeroing a transfer buffer memory as a background task' [patent_app_type] => new [patent_app_number] => 10/006553 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9370 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20020065984.pdf [firstpage_image] =>[orig_patent_app_number] => 10006553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006553
Method and apparatus for zeroing a transfer buffer memory as a background task Dec 3, 2001 Issued
Array ( [id] => 6211535 [patent_doc_number] => 20020073274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Apparatus and method to precisely position packets for a queue based memory controller' [patent_app_type] => new [patent_app_number] => 10/004583 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8863 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20020073274.pdf [firstpage_image] =>[orig_patent_app_number] => 10004583 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/004583
Apparatus and method to precisely position packets for a queue based memory controller Dec 3, 2001 Issued
Array ( [id] => 553525 [patent_doc_number] => 07174422 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-06 [patent_title] => 'Data storage device with two-tier raid control circuitry' [patent_app_type] => utility [patent_app_number] => 10/004090 [patent_app_country] => US [patent_app_date] => 2001-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4281 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/174/07174422.pdf [firstpage_image] =>[orig_patent_app_number] => 10004090 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/004090
Data storage device with two-tier raid control circuitry Oct 22, 2001 Issued
Array ( [id] => 6161756 [patent_doc_number] => 20020147992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Method, system and computer program product for efficient storage of data' [patent_app_type] => new [patent_app_number] => 09/978469 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6341 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20020147992.pdf [firstpage_image] =>[orig_patent_app_number] => 09978469 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978469
Method and system for efficient storage of data in a set top box Oct 16, 2001 Issued
Array ( [id] => 534048 [patent_doc_number] => 07194561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Method and apparatus for scheduling requests to a resource using a configurable threshold' [patent_app_type] => utility [patent_app_number] => 09/977600 [patent_app_country] => US [patent_app_date] => 2001-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3047 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/194/07194561.pdf [firstpage_image] =>[orig_patent_app_number] => 09977600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977600
Method and apparatus for scheduling requests to a resource using a configurable threshold Oct 11, 2001 Issued
Array ( [id] => 1323872 [patent_doc_number] => 06611885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-26 [patent_title] => 'Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths' [patent_app_type] => B2 [patent_app_number] => 09/974349 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8101 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611885.pdf [firstpage_image] =>[orig_patent_app_number] => 09974349 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/974349
Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths Oct 8, 2001 Issued
Array ( [id] => 6637008 [patent_doc_number] => 20020016885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-07 [patent_title] => 'Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths' [patent_app_type] => new [patent_app_number] => 09/974350 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8075 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20020016885.pdf [firstpage_image] =>[orig_patent_app_number] => 09974350 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/974350
Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths Oct 8, 2001 Issued
Array ( [id] => 6637001 [patent_doc_number] => 20020016884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-07 [patent_title] => 'Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths' [patent_app_type] => new [patent_app_number] => 09/974384 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8088 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20020016884.pdf [firstpage_image] =>[orig_patent_app_number] => 09974384 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/974384
Method and apparatus for reading write-modified read data in memory device providing synchronous data transfers Oct 8, 2001 Issued
Array ( [id] => 1398197 [patent_doc_number] => 06556483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-29 [patent_title] => 'Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths' [patent_app_type] => B2 [patent_app_number] => 09/973999 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8100 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/556/06556483.pdf [firstpage_image] =>[orig_patent_app_number] => 09973999 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/973999
Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths Oct 8, 2001 Issued
Array ( [id] => 6035559 [patent_doc_number] => 20020019918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths' [patent_app_type] => new [patent_app_number] => 09/974387 [patent_app_country] => US [patent_app_date] => 2001-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8089 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20020019918.pdf [firstpage_image] =>[orig_patent_app_number] => 09974387 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/974387
Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths Oct 8, 2001 Issued
Array ( [id] => 7962259 [patent_doc_number] => 06681300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-20 [patent_title] => 'Read lock miss control and queue management' [patent_app_type] => B2 [patent_app_number] => 09/969436 [patent_app_country] => US [patent_app_date] => 2001-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3121 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/681/06681300.pdf [firstpage_image] =>[orig_patent_app_number] => 09969436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/969436
Read lock miss control and queue management Oct 1, 2001 Issued
Array ( [id] => 6211618 [patent_doc_number] => 20020073326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Protect by data chunk address as encryption key' [patent_app_type] => new [patent_app_number] => 09/950463 [patent_app_country] => US [patent_app_date] => 2001-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2787 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20020073326.pdf [firstpage_image] =>[orig_patent_app_number] => 09950463 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950463
Protect by data chunk address as encryption key Sep 9, 2001 Abandoned
09/945348 Computerized data collection system Aug 30, 2001 Abandoned
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