Search

Troy Chambers

Supervisory Patent Examiner (ID: 10357, Phone: (571)272-6874 , Office: P/3641 )

Most Active Art Unit
3641
Art Unit(s)
3658, 3641
Total Applications
1158
Issued Applications
719
Pending Applications
123
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3904972 [patent_doc_number] => 05835413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Method for improved data retention in a nonvolatile writeable memory by sensing and reprogramming cell voltage levels' [patent_app_type] => 1 [patent_app_number] => 8/771445 [patent_app_country] => US [patent_app_date] => 1996-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2860 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835413.pdf [firstpage_image] =>[orig_patent_app_number] => 771445 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/771445
Method for improved data retention in a nonvolatile writeable memory by sensing and reprogramming cell voltage levels Dec 19, 1996 Issued
Array ( [id] => 3814112 [patent_doc_number] => 05781912 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Recoverable data replication between source site and destination site without distributed transactions' [patent_app_type] => 1 [patent_app_number] => 8/772003 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11351 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781912.pdf [firstpage_image] =>[orig_patent_app_number] => 772003 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/772003
Recoverable data replication between source site and destination site without distributed transactions Dec 18, 1996 Issued
Array ( [id] => 3639733 [patent_doc_number] => 05687183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Memory access system with overwrite prevention for overlapping write operations' [patent_app_type] => 1 [patent_app_number] => 8/766980 [patent_app_country] => US [patent_app_date] => 1996-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3441 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687183.pdf [firstpage_image] =>[orig_patent_app_number] => 766980 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/766980
Memory access system with overwrite prevention for overlapping write operations Dec 15, 1996 Issued
Array ( [id] => 4151850 [patent_doc_number] => 06035381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Memory device including main memory storage and distinct key storage accessed using only a row address' [patent_app_type] => 1 [patent_app_number] => 8/764253 [patent_app_country] => US [patent_app_date] => 1996-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2683 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035381.pdf [firstpage_image] =>[orig_patent_app_number] => 764253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/764253
Memory device including main memory storage and distinct key storage accessed using only a row address Dec 11, 1996 Issued
Array ( [id] => 3782159 [patent_doc_number] => 05845328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Method for ensuring data coherency for redundat storage by transferring copies of access requests from on-line storage to back-up storage' [patent_app_type] => 1 [patent_app_number] => 8/766455 [patent_app_country] => US [patent_app_date] => 1996-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4990 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845328.pdf [firstpage_image] =>[orig_patent_app_number] => 766455 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/766455
Method for ensuring data coherency for redundat storage by transferring copies of access requests from on-line storage to back-up storage Dec 11, 1996 Issued
Array ( [id] => 1567397 [patent_doc_number] => 06438663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'System and method for identifying shared virtual memory in a computer cluster' [patent_app_type] => B1 [patent_app_number] => 08/763912 [patent_app_country] => US [patent_app_date] => 1996-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438663.pdf [firstpage_image] =>[orig_patent_app_number] => 08763912 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763912
System and method for identifying shared virtual memory in a computer cluster Dec 10, 1996 Issued
Array ( [id] => 4118232 [patent_doc_number] => 06098151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Cache memory control system that caches requested data and adjacently displayed data' [patent_app_type] => 1 [patent_app_number] => 8/763868 [patent_app_country] => US [patent_app_date] => 1996-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4614 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/098/06098151.pdf [firstpage_image] =>[orig_patent_app_number] => 763868 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763868
Cache memory control system that caches requested data and adjacently displayed data Dec 10, 1996 Issued
Array ( [id] => 3900977 [patent_doc_number] => 05897655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'System and method for cache replacement within a cache set based on valid, modified or least recently used status in order of preference' [patent_app_type] => 1 [patent_app_number] => 8/763275 [patent_app_country] => US [patent_app_date] => 1996-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10513 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897655.pdf [firstpage_image] =>[orig_patent_app_number] => 763275 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763275
System and method for cache replacement within a cache set based on valid, modified or least recently used status in order of preference Dec 9, 1996 Issued
Array ( [id] => 3798274 [patent_doc_number] => 05809536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Method for reducing the number of coherency cycles within a directory-based cache coherency memory system uitilizing a memory state cache' [patent_app_type] => 1 [patent_app_number] => 8/763703 [patent_app_country] => US [patent_app_date] => 1996-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5679 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809536.pdf [firstpage_image] =>[orig_patent_app_number] => 763703 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763703
Method for reducing the number of coherency cycles within a directory-based cache coherency memory system uitilizing a memory state cache Dec 8, 1996 Issued
Array ( [id] => 4049726 [patent_doc_number] => 05857213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Method for extraction of a variable length record from fixed length sectors on a disk drive and for reblocking remaining records in a disk track' [patent_app_type] => 1 [patent_app_number] => 8/761639 [patent_app_country] => US [patent_app_date] => 1996-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5279 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857213.pdf [firstpage_image] =>[orig_patent_app_number] => 761639 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/761639
Method for extraction of a variable length record from fixed length sectors on a disk drive and for reblocking remaining records in a disk track Dec 5, 1996 Issued
Array ( [id] => 4019411 [patent_doc_number] => 05860088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Method for extraction of a variable length record from fixed length sectors on a disk drive' [patent_app_type] => 1 [patent_app_number] => 8/761719 [patent_app_country] => US [patent_app_date] => 1996-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5243 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860088.pdf [firstpage_image] =>[orig_patent_app_number] => 761719 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/761719
Method for extraction of a variable length record from fixed length sectors on a disk drive Dec 5, 1996 Issued
Array ( [id] => 4162238 [patent_doc_number] => 06032224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Hierarchical performance system for managing a plurality of storage units with different access speeds' [patent_app_type] => 1 [patent_app_number] => 8/757124 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3265 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/032/06032224.pdf [firstpage_image] =>[orig_patent_app_number] => 757124 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/757124
Hierarchical performance system for managing a plurality of storage units with different access speeds Dec 2, 1996 Issued
Array ( [id] => 4225814 [patent_doc_number] => 06029231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Retrieval of data stored on redundant disks across a network using remote procedure calls' [patent_app_type] => 1 [patent_app_number] => 8/757122 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2360 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029231.pdf [firstpage_image] =>[orig_patent_app_number] => 757122 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/757122
Retrieval of data stored on redundant disks across a network using remote procedure calls Dec 2, 1996 Issued
Array ( [id] => 4422451 [patent_doc_number] => 06173366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage' [patent_app_type] => 1 [patent_app_number] => 8/759044 [patent_app_country] => US [patent_app_date] => 1996-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 20088 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/173/06173366.pdf [firstpage_image] =>[orig_patent_app_number] => 759044 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/759044
Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage Dec 1, 1996 Issued
08/750311 MEMORY MODULE Nov 19, 1996 Abandoned
Array ( [id] => 4260189 [patent_doc_number] => 06167486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Parallel access virtual channel memory system with cacheable channels' [patent_app_type] => 1 [patent_app_number] => 8/746829 [patent_app_country] => US [patent_app_date] => 1996-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9140 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167486.pdf [firstpage_image] =>[orig_patent_app_number] => 746829 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/746829
Parallel access virtual channel memory system with cacheable channels Nov 17, 1996 Issued
Array ( [id] => 4206638 [patent_doc_number] => 06131141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Method of and portable apparatus for determining and utilizing timing parameters for direct duplication of hard disk drives' [patent_app_type] => 1 [patent_app_number] => 8/749416 [patent_app_country] => US [patent_app_date] => 1996-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6627 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/131/06131141.pdf [firstpage_image] =>[orig_patent_app_number] => 749416 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/749416
Method of and portable apparatus for determining and utilizing timing parameters for direct duplication of hard disk drives Nov 14, 1996 Issued
Array ( [id] => 4011076 [patent_doc_number] => 05920890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Distributed tag cache memory system and method for storing data in the same' [patent_app_type] => 1 [patent_app_number] => 8/748856 [patent_app_country] => US [patent_app_date] => 1996-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4742 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920890.pdf [firstpage_image] =>[orig_patent_app_number] => 748856 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/748856
Distributed tag cache memory system and method for storing data in the same Nov 13, 1996 Issued
Array ( [id] => 4147600 [patent_doc_number] => 06128711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writes' [patent_app_type] => 1 [patent_app_number] => 8/745553 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 12386 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128711.pdf [firstpage_image] =>[orig_patent_app_number] => 745553 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/745553
Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writes Nov 11, 1996 Issued
Array ( [id] => 3895581 [patent_doc_number] => 05826109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Method and apparatus for performing multiple load operations to the same memory location in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/747197 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 18006 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826109.pdf [firstpage_image] =>[orig_patent_app_number] => 747197 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/747197
Method and apparatus for performing multiple load operations to the same memory location in a computer system Nov 11, 1996 Issued
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