| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3922789
[patent_doc_number] => 05752261
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Method and apparatus for detecting thrashing in a cache memory'
[patent_app_type] => 1
[patent_app_number] => 8/745035
[patent_app_country] => US
[patent_app_date] => 1996-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6714
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/752/05752261.pdf
[firstpage_image] =>[orig_patent_app_number] => 745035
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/745035 | Method and apparatus for detecting thrashing in a cache memory | Nov 6, 1996 | Issued |
Array
(
[id] => 3797986
[patent_doc_number] => 05809520
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'Interchangeable cartridge data storage system for devices performing diverse functions'
[patent_app_type] => 1
[patent_app_number] => 8/746085
[patent_app_country] => US
[patent_app_date] => 1996-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 18
[patent_no_of_words] => 5743
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/809/05809520.pdf
[firstpage_image] =>[orig_patent_app_number] => 746085
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/746085 | Interchangeable cartridge data storage system for devices performing diverse functions | Nov 5, 1996 | Issued |
Array
(
[id] => 4315983
[patent_doc_number] => 06199120
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-06
[patent_title] => 'IC card reading/writing apparatus and method for allowing use of multiple vendors'
[patent_app_type] => 1
[patent_app_number] => 8/736431
[patent_app_country] => US
[patent_app_date] => 1996-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 23
[patent_no_of_words] => 19699
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/199/06199120.pdf
[firstpage_image] =>[orig_patent_app_number] => 736431
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/736431 | IC card reading/writing apparatus and method for allowing use of multiple vendors | Oct 23, 1996 | Issued |
Array
(
[id] => 4011762
[patent_doc_number] => 05893168
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Structure and method for memory initialization and power on'
[patent_app_type] => 1
[patent_app_number] => 8/733407
[patent_app_country] => US
[patent_app_date] => 1996-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3391
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/893/05893168.pdf
[firstpage_image] =>[orig_patent_app_number] => 733407
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/733407 | Structure and method for memory initialization and power on | Oct 17, 1996 | Issued |
Array
(
[id] => 4268043
[patent_doc_number] => 06138141
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Server to client cache protocol for improved web performance'
[patent_app_type] => 1
[patent_app_number] => 8/733486
[patent_app_country] => US
[patent_app_date] => 1996-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3492
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/138/06138141.pdf
[firstpage_image] =>[orig_patent_app_number] => 733486
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/733486 | Server to client cache protocol for improved web performance | Oct 17, 1996 | Issued |
Array
(
[id] => 3797411
[patent_doc_number] => 05819108
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Programming of software into programmable memory within a peripheral device'
[patent_app_type] => 1
[patent_app_number] => 8/732949
[patent_app_country] => US
[patent_app_date] => 1996-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2313
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/819/05819108.pdf
[firstpage_image] =>[orig_patent_app_number] => 732949
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/732949 | Programming of software into programmable memory within a peripheral device | Oct 16, 1996 | Issued |
Array
(
[id] => 3742662
[patent_doc_number] => 05671444
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers'
[patent_app_type] => 1
[patent_app_number] => 8/731545
[patent_app_country] => US
[patent_app_date] => 1996-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 9219
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/671/05671444.pdf
[firstpage_image] =>[orig_patent_app_number] => 731545
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/731545 | Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers | Oct 14, 1996 | Issued |
Array
(
[id] => 3898345
[patent_doc_number] => 05765211
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Segmenting non-volatile memory into logical pages sized to fit groups of commonly erasable data'
[patent_app_type] => 1
[patent_app_number] => 8/730747
[patent_app_country] => US
[patent_app_date] => 1996-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2392
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/765/05765211.pdf
[firstpage_image] =>[orig_patent_app_number] => 730747
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/730747 | Segmenting non-volatile memory into logical pages sized to fit groups of commonly erasable data | Oct 14, 1996 | Issued |
Array
(
[id] => 4059468
[patent_doc_number] => 05875457
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Fault-tolerant preservation of data integrity during dynamic raid set expansion'
[patent_app_type] => 1
[patent_app_number] => 8/727745
[patent_app_country] => US
[patent_app_date] => 1996-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3533
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/875/05875457.pdf
[firstpage_image] =>[orig_patent_app_number] => 727745
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/727745 | Fault-tolerant preservation of data integrity during dynamic raid set expansion | Oct 7, 1996 | Issued |
| 08/723525 | APPARATUS AND METHOD FOR ACCESSING FLASH MEMORY DURING ENGINE OPERATION | Sep 29, 1996 | Abandoned |
Array
(
[id] => 3896333
[patent_doc_number] => 05777630
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Method and apparatus for displaying image and facsimile data on a non-programmable-terminal attached to a host computer by a work station controller'
[patent_app_type] => 1
[patent_app_number] => 8/727173
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 23
[patent_no_of_words] => 7376
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/777/05777630.pdf
[firstpage_image] =>[orig_patent_app_number] => 727173
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/727173 | Method and apparatus for displaying image and facsimile data on a non-programmable-terminal attached to a host computer by a work station controller | Sep 29, 1996 | Issued |
Array
(
[id] => 4019941
[patent_doc_number] => 05860124
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Method for performing a continuous over-write of a file in nonvolatile memory'
[patent_app_type] => 1
[patent_app_number] => 8/722979
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8072
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/860/05860124.pdf
[firstpage_image] =>[orig_patent_app_number] => 722979
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/722979 | Method for performing a continuous over-write of a file in nonvolatile memory | Sep 29, 1996 | Issued |
Array
(
[id] => 3804256
[patent_doc_number] => 05737637
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'System for control of data I/O transfer based on cycle count in a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/720309
[patent_app_country] => US
[patent_app_date] => 1996-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 63
[patent_no_of_words] => 8989
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/737/05737637.pdf
[firstpage_image] =>[orig_patent_app_number] => 720309
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/720309 | System for control of data I/O transfer based on cycle count in a semiconductor memory device | Sep 26, 1996 | Issued |
Array
(
[id] => 3735954
[patent_doc_number] => 05701437
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Dual-memory managing apparatus and method including prioritization of backup and update operations'
[patent_app_type] => 1
[patent_app_number] => 8/710088
[patent_app_country] => US
[patent_app_date] => 1996-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 6913
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/701/05701437.pdf
[firstpage_image] =>[orig_patent_app_number] => 710088
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/710088 | Dual-memory managing apparatus and method including prioritization of backup and update operations | Sep 9, 1996 | Issued |
Array
(
[id] => 3784220
[patent_doc_number] => 05850632
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-15
[patent_title] => 'Memory access controller utilizing cache memory to store configuration information'
[patent_app_type] => 1
[patent_app_number] => 8/706619
[patent_app_country] => US
[patent_app_date] => 1996-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 19376
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/850/05850632.pdf
[firstpage_image] =>[orig_patent_app_number] => 706619
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/706619 | Memory access controller utilizing cache memory to store configuration information | Sep 5, 1996 | Issued |
Array
(
[id] => 3969388
[patent_doc_number] => 05956744
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-21
[patent_title] => 'Memory configuration cache with multilevel hierarchy least recently used cache entry replacement'
[patent_app_type] => 1
[patent_app_number] => 8/706618
[patent_app_country] => US
[patent_app_date] => 1996-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 17414
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/956/05956744.pdf
[firstpage_image] =>[orig_patent_app_number] => 706618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/706618 | Memory configuration cache with multilevel hierarchy least recently used cache entry replacement | Sep 5, 1996 | Issued |
Array
(
[id] => 3798451
[patent_doc_number] => 05809548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'System and method for zeroing pages with cache line invalidate instructions in an LRU system having data cache with time tags'
[patent_app_type] => 1
[patent_app_number] => 8/706053
[patent_app_country] => US
[patent_app_date] => 1996-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4602
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/809/05809548.pdf
[firstpage_image] =>[orig_patent_app_number] => 706053
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/706053 | System and method for zeroing pages with cache line invalidate instructions in an LRU system having data cache with time tags | Aug 29, 1996 | Issued |
Array
(
[id] => 4367532
[patent_doc_number] => 06292443
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Information recording apparatus and method for playing a plurality of information recording mediums'
[patent_app_type] => 1
[patent_app_number] => 8/703501
[patent_app_country] => US
[patent_app_date] => 1996-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 4894
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/292/06292443.pdf
[firstpage_image] =>[orig_patent_app_number] => 703501
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/703501 | Information recording apparatus and method for playing a plurality of information recording mediums | Aug 26, 1996 | Issued |
Array
(
[id] => 4059663
[patent_doc_number] => 05875469
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Apparatus and method of snooping processors and look-aside caches'
[patent_app_type] => 1
[patent_app_number] => 8/703323
[patent_app_country] => US
[patent_app_date] => 1996-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3359
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/875/05875469.pdf
[firstpage_image] =>[orig_patent_app_number] => 703323
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/703323 | Apparatus and method of snooping processors and look-aside caches | Aug 25, 1996 | Issued |
Array
(
[id] => 3805957
[patent_doc_number] => 05822777
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Dual bus data storage system having an addressable memory with timer controller fault detection of data transfer between the memory and the buses'
[patent_app_type] => 1
[patent_app_number] => 8/699503
[patent_app_country] => US
[patent_app_date] => 1996-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 29
[patent_no_of_words] => 8151
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822777.pdf
[firstpage_image] =>[orig_patent_app_number] => 699503
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/699503 | Dual bus data storage system having an addressable memory with timer controller fault detection of data transfer between the memory and the buses | Aug 22, 1996 | Issued |