Troy Chambers

Array ( [id] => 3588951 [patent_doc_number] => 05524228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Memory control circuit for reducing the number of row address signals' [patent_app_type] => 1 [patent_app_number] => 8/203606 [patent_app_country] => US [patent_app_date] => 1994-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3165 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 468 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/524/05524228.pdf [firstpage_image] =>[orig_patent_app_number] => 203606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3707904 [patent_doc_number] => 05596739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Method and apparatus for detecting memory segment violations in a microprocessor-based system' [patent_app_type] => 1 [patent_app_number] => 8/193388 [patent_app_country] => US [patent_app_date] => 1994-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11393 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596739.pdf [firstpage_image] =>[orig_patent_app_number] => 193388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3612328 [patent_doc_number] => 05559986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Interleaved cache for multiple accesses per clock cycle in a microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/191052 [patent_app_country] => US [patent_app_date] => 1994-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5506 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559986.pdf [firstpage_image] =>[orig_patent_app_number] => 191052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3660007 [patent_doc_number] => 05630097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Enhanced cache operation with remapping of pages for optimizing data relocation from addresses causing cache misses' [patent_app_type] => 1 [patent_app_number] => 8/178487 [patent_app_country] => US [patent_app_date] => 1994-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5233 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630097.pdf [firstpage_image] =>[orig_patent_app_number] => 178487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3568950 [patent_doc_number] => 05544293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Buffer storage system and method using page designating address and intra-page address and detecting valid data' [patent_app_type] => 1 [patent_app_number] => 8/176679 [patent_app_country] => US [patent_app_date] => 1994-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2937 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544293.pdf [firstpage_image] =>[orig_patent_app_number] => 176679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3503778 [patent_doc_number] => 05561814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Methods and apparatus for determining memory operating characteristics for given memory locations via assigned address ranges' [patent_app_type] => 1 [patent_app_number] => 8/171528 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3586 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561814.pdf [firstpage_image] =>[orig_patent_app_number] => 171528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3672716 [patent_doc_number] => 05592648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Method for developing physical disk drive specific commands from logical disk access commands for use in a disk array' [patent_app_type] => 1 [patent_app_number] => 8/163011 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 23360 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592648.pdf [firstpage_image] =>[orig_patent_app_number] => 163011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3471792 [patent_doc_number] => 05442753 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Circuitry for providing replica data transfer signal during DMA verify operations' [patent_app_type] => 1 [patent_app_number] => 8/163165 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8421 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442753.pdf [firstpage_image] =>[orig_patent_app_number] => 163165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3525115 [patent_doc_number] => 05487024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-23 [patent_title] => 'Data processing system for hardware implementation of square operations and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/152075 [patent_app_country] => US [patent_app_date] => 1993-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3516 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/487/05487024.pdf [firstpage_image] =>[orig_patent_app_number] => 152075 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3675582 [patent_doc_number] => 05625797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Automatic optimization of a compiled memory structure based on user selected criteria' [patent_app_type] => 1 [patent_app_number] => 8/148420 [patent_app_country] => US [patent_app_date] => 1993-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 2650 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625797.pdf [firstpage_image] =>[orig_patent_app_number] => 148420 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3585635 [patent_doc_number] => 05539897 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Buffer memory management with register list to provide an ordered list of buffer memory addresses into which the latest series of data blocks is written' [patent_app_type] => 1 [patent_app_number] => 8/147096 [patent_app_country] => US [patent_app_date] => 1993-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 9479 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539897.pdf [firstpage_image] =>[orig_patent_app_number] => 147096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3600537 [patent_doc_number] => 05497501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'DMA controller using a predetermined number of transfers per request' [patent_app_type] => 1 [patent_app_number] => 8/147034 [patent_app_country] => US [patent_app_date] => 1993-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4645 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497501.pdf [firstpage_image] =>[orig_patent_app_number] => 147034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3502744 [patent_doc_number] => 05440716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Method for developing physical disk drive specific commands from logical disk access commands for use in a disk array' [patent_app_type] => 1 [patent_app_number] => 8/145029 [patent_app_country] => US [patent_app_date] => 1993-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 23395 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/440/05440716.pdf [firstpage_image] =>[orig_patent_app_number] => 145029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3668122 [patent_doc_number] => 05592348 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Method and structure for locating and skipping over servo bursts on a magnetic disk' [patent_app_type] => 1 [patent_app_number] => 8/145037 [patent_app_country] => US [patent_app_date] => 1993-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 43 [patent_no_of_words] => 11020 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592348.pdf [firstpage_image] =>[orig_patent_app_number] => 145037 [rel_patent_id] =>[rel_patent_doc_number] =>)