Search

Troy Chambers

Supervisory Patent Examiner (ID: 10357, Phone: (571)272-6874 , Office: P/3641 )

Most Active Art Unit
3641
Art Unit(s)
3658, 3641
Total Applications
1158
Issued Applications
719
Pending Applications
123
Abandoned Applications
316
Applications
StatisticsSubscription-Only

Applications

Application numberTitle of the applicationFiling DateStatus
08/073247 HIGH SPEED BIT MASK REGISTER ARCHITECTURE Jun 6, 1993 Pending
Array ( [id] => 3094620 [patent_doc_number] => 05285323 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Integrated circuit chip having primary and secondary random access memories for a hierarchical cache' [patent_app_type] => 1 [patent_app_number] => 8/061273 [patent_app_country] => US [patent_app_date] => 1993-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 10206 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 460 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285323.pdf [firstpage_image] =>[orig_patent_app_number] => 061273 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/061273 		Integrated circuit chip having primary and secondary random access memories for a hierarchical cache May 12, 1993 Issued
08/045311 SEMICONDUCOTR MEMORY DEVICE AND OPERATING METHOD THEREFOR Apr 11, 1993 Pending
Array ( [id] => 3565442 [patent_doc_number] => 05493724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Locking a non-busy device for accessing a data record stored on another device' [patent_app_type] => 1 [patent_app_number] => 8/041376 [patent_app_country] => US [patent_app_date] => 1993-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5280 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/493/05493724.pdf [firstpage_image] =>[orig_patent_app_number] => 041376 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/041376 		Locking a non-busy device for accessing a data record stored on another device Mar 31, 1993 Issued
08/031048 METHOD AND APPARATUS FOR ENHANCING SYNCHRONOUS I/O IN A COMPUTER SYSTEM WITH A NON-VOLATILE MEMORY AND USING AN ACCELERATION DEVICE DRIVER IN A COMPUTER OPERATING SYSTEM Mar 10, 1993 Issued
08/032831 LOG FOR MANAGING DATA IN A SHADOW SET OF STORAGE MEDIA Mar 9, 1993 Pending
Array ( [id] => 3132915 [patent_doc_number] => 05450564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Method and apparatus for cache memory access with separate fetch and store queues' [patent_app_type] => 1 [patent_app_number] => 8/013254 [patent_app_country] => US [patent_app_date] => 1993-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6562 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450564.pdf [firstpage_image] =>[orig_patent_app_number] => 013254 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/013254 		Method and apparatus for cache memory access with separate fetch and store queues Feb 2, 1993 Issued
08/012676 APPARATUS AND METHODS FOR THE HANDLING OF BANDED FRAME BUFFER OVERFLOWS Feb 2, 1993 Abandoned
08/010697 CACHE MEMORY AND CACHE SYSTEM Jan 28, 1993 Abandoned
Array ( [id] => 2989546 [patent_doc_number] => 05253203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Subarray architecture with partial address translation' [patent_app_type] => 1 [patent_app_number] => 8/002689 [patent_app_country] => US [patent_app_date] => 1993-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6464 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 484 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/253/05253203.pdf [firstpage_image] =>[orig_patent_app_number] => 002689 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/002689 		Subarray architecture with partial address translation Jan 10, 1993 Issued
08/001424 MEMORY AND APPARATUS FOR CONCURRENTLY ACCESSING MULTIPLE MEMORIES Jan 6, 1993 Abandoned
Array ( [id] => 3064889 [patent_doc_number] => 05307476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Floppy disk controller with DMA verify operations' [patent_app_type] => 1 [patent_app_number] => 7/999470 [patent_app_country] => US [patent_app_date] => 1992-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8360 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/307/05307476.pdf [firstpage_image] =>[orig_patent_app_number] => 999470 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/999470 		Floppy disk controller with DMA verify operations Dec 28, 1992 Issued
07/989456 HIGH SPEED BIT MASK REGISTER ARCHITECTURE Dec 8, 1992 Abandoned
Array ( [id] => 3796817 [patent_doc_number] => 05758148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'System and method for searching a data base using a content-searchable memory' [patent_app_type] => 1 [patent_app_number] => 7/987008 [patent_app_country] => US [patent_app_date] => 1992-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 12308 [patent_no_of_claims] => 68 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758148.pdf [firstpage_image] =>[orig_patent_app_number] => 987008 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/987008 		System and method for searching a data base using a content-searchable memory Dec 6, 1992 Issued
07/983094 DIRECT MEMORY ACCESS CONTROL DEVICE AND METHOD IN MULTIPROCESSOR SYSTEM Nov 23, 1992 Abandoned
Array ( [id] => 3125263 [patent_doc_number] => 05396483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Recording medium having a track and electrode layer provided and recording and reproducing device and system using same' [patent_app_type] => 1 [patent_app_number] => 7/978023 [patent_app_country] => US [patent_app_date] => 1992-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6549 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396483.pdf [firstpage_image] =>[orig_patent_app_number] => 978023 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/978023 		Recording medium having a track and electrode layer provided and recording and reproducing device and system using same Nov 17, 1992 Issued
Array ( [id] => 3716532 [patent_doc_number] => 05675767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method for verification and restoration of directories in CPU system managed store' [patent_app_type] => 1 [patent_app_number] => 7/973937 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3349 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675767.pdf [firstpage_image] =>[orig_patent_app_number] => 973937 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/973937 		Method for verification and restoration of directories in CPU system managed store Nov 9, 1992 Issued
Array ( [id] => 3497565 [patent_doc_number] => 05426759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-20 [patent_title] => 'On-chip/off-chip memory switching using system configuration bit' [patent_app_type] => 1 [patent_app_number] => 7/973319 [patent_app_country] => US [patent_app_date] => 1992-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1996 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/426/05426759.pdf [firstpage_image] =>[orig_patent_app_number] => 973319 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/973319 		On-chip/off-chip memory switching using system configuration bit Nov 8, 1992 Issued
07/960202 HIERARCHICAL MULTI-DATA LINES DRAM ARRAY ARCHITECTURE WITH HIGH SPEED SENSING CIRCUIT Oct 12, 1992 Abandoned
07/942217 MEMORY CIRCUIT Sep 8, 1992 Abandoned
Menu