Search

Trung Q. Dang

Examiner (ID: 7539, Phone: (571)272-1857 , Office: P/2819 )

Most Active Art Unit
2892
Art Unit(s)
1104, 2822, 2823, 2892, 2813, 2819
Total Applications
2045
Issued Applications
1873
Pending Applications
10
Abandoned Applications
172

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6563012 [patent_doc_number] => 20100059858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'Integrated capacitors in package-level structures, processes of making same, and systems containing same' [patent_app_type] => utility [patent_app_number] => 12/590547 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4533 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20100059858.pdf [firstpage_image] =>[orig_patent_app_number] => 12590547 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/590547
Integrated capacitors in package-level structures, processes of making same, and systems containing same Nov 9, 2009 Issued
Array ( [id] => 8653521 [patent_doc_number] => 08373272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Device under bonding pad using single metallization' [patent_app_type] => utility [patent_app_number] => 12/582690 [patent_app_country] => US [patent_app_date] => 2009-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2266 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12582690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/582690
Device under bonding pad using single metallization Oct 19, 2009 Issued
Array ( [id] => 9413507 [patent_doc_number] => 08697544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Method for manufacturing bonded wafer' [patent_app_type] => utility [patent_app_number] => 13/126993 [patent_app_country] => US [patent_app_date] => 2009-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3853 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13126993 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/126993
Method for manufacturing bonded wafer Oct 13, 2009 Issued
Array ( [id] => 6247272 [patent_doc_number] => 20100025812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'PINCHED POLY FUSE' [patent_app_type] => utility [patent_app_number] => 12/576290 [patent_app_country] => US [patent_app_date] => 2009-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1737 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20100025812.pdf [firstpage_image] =>[orig_patent_app_number] => 12576290 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/576290
Pinched poly fuse Oct 8, 2009 Issued
Array ( [id] => 6247227 [patent_doc_number] => 20100025781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Transistors with Multilayered Dielectric Films and Methods of Manufacturing Such Transistors' [patent_app_type] => utility [patent_app_number] => 12/574912 [patent_app_country] => US [patent_app_date] => 2009-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7572 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20100025781.pdf [firstpage_image] =>[orig_patent_app_number] => 12574912 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/574912
Transistors with multilayered dielectric films Oct 6, 2009 Issued
Array ( [id] => 4573761 [patent_doc_number] => 07855093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Semiconductor laser device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/572720 [patent_app_country] => US [patent_app_date] => 2009-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3568 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/855/07855093.pdf [firstpage_image] =>[orig_patent_app_number] => 12572720 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/572720
Semiconductor laser device and method of manufacturing the same Oct 1, 2009 Issued
Array ( [id] => 8006835 [patent_doc_number] => 08084822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Enhanced stress-retention fin-FET devices and methods of fabricating enhanced stress retention fin-FET devices' [patent_app_type] => utility [patent_app_number] => 12/570384 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3292 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084822.pdf [firstpage_image] =>[orig_patent_app_number] => 12570384 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/570384
Enhanced stress-retention fin-FET devices and methods of fabricating enhanced stress retention fin-FET devices Sep 29, 2009 Issued
Array ( [id] => 6118717 [patent_doc_number] => 20110076390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'METHODS FOR MULTI-STEP COPPER PLATING ON A CONTINUOUS RUTHENIUM FILM IN RECESSED FEATURES' [patent_app_type] => utility [patent_app_number] => 12/571162 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13375 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20110076390.pdf [firstpage_image] =>[orig_patent_app_number] => 12571162 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/571162
Methods for multi-step copper plating on a continuous ruthenium film in recessed features Sep 29, 2009 Issued
Array ( [id] => 8317406 [patent_doc_number] => 08232177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Method of generating uniformly aligned well and isolation regions in a substrate and resulting structure' [patent_app_type] => utility [patent_app_number] => 12/570415 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 3011 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12570415 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/570415
Method of generating uniformly aligned well and isolation regions in a substrate and resulting structure Sep 29, 2009 Issued
Array ( [id] => 7551061 [patent_doc_number] => 08063395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-22 [patent_title] => 'Memristor amorphous metal alloy electrodes' [patent_app_type] => utility [patent_app_number] => 12/570286 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/063/08063395.pdf [firstpage_image] =>[orig_patent_app_number] => 12570286 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/570286
Memristor amorphous metal alloy electrodes Sep 29, 2009 Issued
Array ( [id] => 7515858 [patent_doc_number] => 08039930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Package structure for wireless communication module' [patent_app_type] => utility [patent_app_number] => 12/570295 [patent_app_country] => US [patent_app_date] => 2009-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4088 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/039/08039930.pdf [firstpage_image] =>[orig_patent_app_number] => 12570295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/570295
Package structure for wireless communication module Sep 29, 2009 Issued
Array ( [id] => 6215898 [patent_doc_number] => 20100052027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'DRAM Layout with Vertical FETS and Method of Formation' [patent_app_type] => utility [patent_app_number] => 12/568240 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10230 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052027.pdf [firstpage_image] =>[orig_patent_app_number] => 12568240 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/568240
DRAM layout with vertical FETS and method of formation Sep 27, 2009 Issued
Array ( [id] => 6620333 [patent_doc_number] => 20100003500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'CARBON NANOTUBE DEVICE AND PROCESS FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 12/548400 [patent_app_country] => US [patent_app_date] => 2009-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2178 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20100003500.pdf [firstpage_image] =>[orig_patent_app_number] => 12548400 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/548400
CARBON NANOTUBE DEVICE AND PROCESS FOR MANUFACTURING SAME Aug 25, 2009 Abandoned
Array ( [id] => 6130672 [patent_doc_number] => 20110006393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Multilayer electronic devices for imbedded capacitor' [patent_app_type] => utility [patent_app_number] => 12/501411 [patent_app_country] => US [patent_app_date] => 2009-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006393.pdf [firstpage_image] =>[orig_patent_app_number] => 12501411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501411
Multilayer electronic devices for imbedded capacitor Jul 10, 2009 Issued
Array ( [id] => 6304010 [patent_doc_number] => 20100108978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'PROGRAMMABLE RESISTIVE MEMORY CELL WITH SACRIFICIAL METAL' [patent_app_type] => utility [patent_app_number] => 12/500899 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20100108978.pdf [firstpage_image] =>[orig_patent_app_number] => 12500899 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/500899
Programmable resistive memory cell with sacrificial metal Jul 9, 2009 Issued
Array ( [id] => 6502201 [patent_doc_number] => 20100013001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'METHOD FOR MANUFACTURING NON-VOLATILE MEMORY AND STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/501029 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4737 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20100013001.pdf [firstpage_image] =>[orig_patent_app_number] => 12501029 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501029
Method for manufacturing non-volatile memory and structure thereof Jul 9, 2009 Issued
Array ( [id] => 4629812 [patent_doc_number] => 08008710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Non-volatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/501142 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/008/08008710.pdf [firstpage_image] =>[orig_patent_app_number] => 12501142 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501142
Non-volatile semiconductor storage device Jul 9, 2009 Issued
Array ( [id] => 7519207 [patent_doc_number] => 07973310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-05 [patent_title] => 'Semiconductor package structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/501100 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9981 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/973/07973310.pdf [firstpage_image] =>[orig_patent_app_number] => 12501100 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501100
Semiconductor package structure and method for manufacturing the same Jul 9, 2009 Issued
Array ( [id] => 7545932 [patent_doc_number] => 08053906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Semiconductor package and method for processing and bonding a wire' [patent_app_type] => utility [patent_app_number] => 12/501285 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 2904 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053906.pdf [firstpage_image] =>[orig_patent_app_number] => 12501285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501285
Semiconductor package and method for processing and bonding a wire Jul 9, 2009 Issued
Array ( [id] => 7713268 [patent_doc_number] => 08093587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Organic el device and process of producing the same' [patent_app_type] => utility [patent_app_number] => 12/501028 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4017 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093587.pdf [firstpage_image] =>[orig_patent_app_number] => 12501028 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501028
Organic el device and process of producing the same Jul 9, 2009 Issued
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