Search

Tse W. Chen

Supervisory Patent Examiner (ID: 19256, Phone: (571)272-3672 , Office: P/3777 )

Most Active Art Unit
2116
Art Unit(s)
3777, 3791, 2116, 3793
Total Applications
339
Issued Applications
183
Pending Applications
27
Abandoned Applications
132

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 774230 [patent_doc_number] => 07007175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Motherboard with reduced power consumption' [patent_app_type] => utility [patent_app_number] => 10/005627 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/007/07007175.pdf [firstpage_image] =>[orig_patent_app_number] => 10005627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005627
Motherboard with reduced power consumption Dec 3, 2001 Issued
Array ( [id] => 599284 [patent_doc_number] => 07444532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'System and method for autonomous power sequencing' [patent_app_type] => utility [patent_app_number] => 10/005936 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6775 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/444/07444532.pdf [firstpage_image] =>[orig_patent_app_number] => 10005936 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005936
System and method for autonomous power sequencing Dec 2, 2001 Issued
Array ( [id] => 6655514 [patent_doc_number] => 20030105947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and system of dynamic video driver selection on a bootable CD' [patent_app_type] => new [patent_app_number] => 10/007425 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5489 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105947.pdf [firstpage_image] =>[orig_patent_app_number] => 10007425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007425
Method and system of dynamic video driver selection on a bootable CD via symbolic links Dec 2, 2001 Issued
Array ( [id] => 5827187 [patent_doc_number] => 20020067645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Method and system for increasing timing margins without deteriorating a data transfer rate' [patent_app_type] => new [patent_app_number] => 10/010611 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5928 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20020067645.pdf [firstpage_image] =>[orig_patent_app_number] => 10010611 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010611
Method and system for increasing timing margins without deteriorating a data transfer rate Dec 2, 2001 Abandoned
Array ( [id] => 6802328 [patent_doc_number] => 20030097493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Regulating file system device access' [patent_app_type] => new [patent_app_number] => 09/991164 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5318 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097493.pdf [firstpage_image] =>[orig_patent_app_number] => 09991164 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/991164
Regulating file system device access Nov 15, 2001 Issued
Array ( [id] => 5932976 [patent_doc_number] => 20020060201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Method of etching semiconductor device using neutral beam and apparatus for etching the same' [patent_app_type] => new [patent_app_number] => 10/010548 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4498 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060201.pdf [firstpage_image] =>[orig_patent_app_number] => 10010548 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010548
Method of etching semiconductor device using neutral beam and apparatus for etching the same Nov 7, 2001 Abandoned
Array ( [id] => 6369230 [patent_doc_number] => 20020059486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Shared component clock protection for multicore DSP device' [patent_app_type] => new [patent_app_number] => 10/008699 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3970 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059486.pdf [firstpage_image] =>[orig_patent_app_number] => 10008699 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/008699
Unanimous voting for disabling of shared component clocking in a multicore DSP device Nov 7, 2001 Issued
Array ( [id] => 6793452 [patent_doc_number] => 20030088796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Communication adapter' [patent_app_type] => new [patent_app_number] => 10/005969 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5250 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088796.pdf [firstpage_image] =>[orig_patent_app_number] => 10005969 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005969
Communication adapter Nov 5, 2001 Abandoned
Array ( [id] => 5791512 [patent_doc_number] => 20020161992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Processor and reset control method for the processor' [patent_app_type] => new [patent_app_number] => 09/985766 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6135 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20020161992.pdf [firstpage_image] =>[orig_patent_app_number] => 09985766 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/985766
Method and processor for initializing a plurality of non-overlapping areas with associated flags and signals Nov 5, 2001 Issued
Array ( [id] => 6793420 [patent_doc_number] => 20030088764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Method of supporting multiple PDA systems on a notebook PC' [patent_app_type] => new [patent_app_number] => 09/985560 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1625 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088764.pdf [firstpage_image] =>[orig_patent_app_number] => 09985560 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/985560
Method of supporting multiple PDA systems on a notebook PC Nov 4, 2001 Abandoned
Array ( [id] => 6793418 [patent_doc_number] => 20030088762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Storage media of operating system arranging at the expansion slot of motherboard' [patent_app_type] => new [patent_app_number] => 09/985577 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1148 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088762.pdf [firstpage_image] =>[orig_patent_app_number] => 09985577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/985577
Storage media of operating system arranging at the expansion slot of motherboard Nov 4, 2001 Abandoned
Array ( [id] => 6425913 [patent_doc_number] => 20020184547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Device and method for selectively powering down integrated circuit blocks within a system on chip' [patent_app_type] => new [patent_app_number] => 10/008586 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3959 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184547.pdf [firstpage_image] =>[orig_patent_app_number] => 10008586 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/008586
Device and method for selectively powering down integrated circuit blocks within a system on chip Nov 4, 2001 Abandoned
Array ( [id] => 6485468 [patent_doc_number] => 20020152407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Power down protocol for integrated circuits' [patent_app_type] => new [patent_app_number] => 10/010738 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3815 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152407.pdf [firstpage_image] =>[orig_patent_app_number] => 10010738 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010738
Integrated circuit selective power down protocol based on acknowledgement Nov 4, 2001 Issued
Array ( [id] => 6793455 [patent_doc_number] => 20030088799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Method and apparatus for regulation of electrical component temperature and power consumption rate through bus width reconfiguration' [patent_app_type] => new [patent_app_number] => 10/010395 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1457 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088799.pdf [firstpage_image] =>[orig_patent_app_number] => 10010395 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010395
Method and apparatus for regulation of electrical component temperature and power consumption rate through bus width reconfiguration Nov 4, 2001 Abandoned
Array ( [id] => 223499 [patent_doc_number] => 07610501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Arrangement for the power supply for a security domain of a device' [patent_app_type] => utility [patent_app_number] => 10/007899 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6035 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/610/07610501.pdf [firstpage_image] =>[orig_patent_app_number] => 10007899 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007899
Arrangement for the power supply for a security domain of a device Nov 4, 2001 Issued
Array ( [id] => 527207 [patent_doc_number] => 07200766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Method and system for the distributed synchronization of users of a communications link' [patent_app_type] => utility [patent_app_number] => 10/021460 [patent_app_country] => US [patent_app_date] => 2001-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3250 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200766.pdf [firstpage_image] =>[orig_patent_app_number] => 10021460 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/021460
Method and system for the distributed synchronization of users of a communications link Oct 28, 2001 Issued
Array ( [id] => 5937908 [patent_doc_number] => 20020062457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Data transfer control device and electronic equipment' [patent_app_type] => new [patent_app_number] => 09/984218 [patent_app_country] => US [patent_app_date] => 2001-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11264 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20020062457.pdf [firstpage_image] =>[orig_patent_app_number] => 09984218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984218
Data transfer control device and electronic equipment Oct 28, 2001 Issued
Array ( [id] => 965715 [patent_doc_number] => 06950954 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-27 [patent_title] => 'Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies' [patent_app_type] => utility [patent_app_number] => 10/011214 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8595 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950954.pdf [firstpage_image] =>[orig_patent_app_number] => 10011214 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/011214
Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies Oct 24, 2001 Issued
Array ( [id] => 927466 [patent_doc_number] => 07318149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-08 [patent_title] => 'Semi-persistent relocatable ram-based virtual floppy disk method' [patent_app_type] => utility [patent_app_number] => 09/965998 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4632 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/318/07318149.pdf [firstpage_image] =>[orig_patent_app_number] => 09965998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/965998
Semi-persistent relocatable ram-based virtual floppy disk method Sep 27, 2001 Issued
Array ( [id] => 525021 [patent_doc_number] => 07197659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-27 [patent_title] => 'Global I/O timing adjustment using calibrated delay elements' [patent_app_type] => utility [patent_app_number] => 09/965223 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 3629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/197/07197659.pdf [firstpage_image] =>[orig_patent_app_number] => 09965223 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/965223
Global I/O timing adjustment using calibrated delay elements Sep 27, 2001 Issued
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