Tse W. Chen

Array ( [id] => 6283396 [patent_doc_number] => 20020108068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Power management for digital processing apparatus' [patent_app_type] => new [patent_app_number] => 10/042464 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2954 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108068.pdf [firstpage_image] =>[orig_patent_app_number] => 10042464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7600001 [patent_doc_number] => 07386711 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-10 [patent_title] => 'Method and apparatus for redirecting the boot operations of one or more systems' [patent_app_type] => utility [patent_app_number] => 10/042846 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4249 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/386/07386711.pdf [firstpage_image] =>[orig_patent_app_number] => 10042846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6857769 [patent_doc_number] => 20030131270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control' [patent_app_type] => new [patent_app_number] => 10/042082 [patent_app_country] => US [patent_app_date] => 2002-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3073 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131270.pdf [firstpage_image] =>[orig_patent_app_number] => 10042082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 933459 [patent_doc_number] => 06981166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Method, apparatus, and computer program product for pacing clocked operations' [patent_app_type] => utility [patent_app_number] => 10/042104 [patent_app_country] => US [patent_app_date] => 2002-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4400 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981166.pdf [firstpage_image] =>[orig_patent_app_number] => 10042104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6857766 [patent_doc_number] => 20030131267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Performance indication system for use with a universal serial bus signal and a method of operation thereof' [patent_app_type] => new [patent_app_number] => 10/041146 [patent_app_country] => US [patent_app_date] => 2002-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3572 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131267.pdf [firstpage_image] =>[orig_patent_app_number] => 10041146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 418220 [patent_doc_number] => 07281140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Digital throttle for multiple operating points' [patent_app_type] => utility [patent_app_number] => 10/041092 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4441 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/281/07281140.pdf [firstpage_image] =>[orig_patent_app_number] => 10041092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 336774 [patent_doc_number] => 07509513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-24 [patent_title] => 'Fault-tolerant synchronisation device for a real-time computer network' [patent_app_type] => utility [patent_app_number] => 10/250474 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2924 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/509/07509513.pdf [firstpage_image] =>[orig_patent_app_number] => 10250474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6698175 [patent_doc_number] => 20030110369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Firmware extensions' [patent_app_type] => new [patent_app_number] => 10/015533 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3889 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110369.pdf [firstpage_image] =>[orig_patent_app_number] => 10015533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 774230 [patent_doc_number] => 07007175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Motherboard with reduced power consumption' [patent_app_type] => utility [patent_app_number] => 10/005627 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/007/07007175.pdf [firstpage_image] =>[orig_patent_app_number] => 10005627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5827187 [patent_doc_number] => 20020067645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Method and system for increasing timing margins without deteriorating a data transfer rate' [patent_app_type] => new [patent_app_number] => 10/010611 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5928 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20020067645.pdf [firstpage_image] =>[orig_patent_app_number] => 10010611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 599284 [patent_doc_number] => 07444532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'System and method for autonomous power sequencing' [patent_app_type] => utility [patent_app_number] => 10/005936 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6775 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/444/07444532.pdf [firstpage_image] =>[orig_patent_app_number] => 10005936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6655514 [patent_doc_number] => 20030105947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and system of dynamic video driver selection on a bootable CD' [patent_app_type] => new [patent_app_number] => 10/007425 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5489 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105947.pdf [firstpage_image] =>[orig_patent_app_number] => 10007425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6802328 [patent_doc_number] => 20030097493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Regulating file system device access' [patent_app_type] => new [patent_app_number] => 09/991164 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5318 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097493.pdf [firstpage_image] =>[orig_patent_app_number] => 09991164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5932976 [patent_doc_number] => 20020060201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Method of etching semiconductor device using neutral beam and apparatus for etching the same' [patent_app_type] => new [patent_app_number] => 10/010548 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4498 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060201.pdf [firstpage_image] =>[orig_patent_app_number] => 10010548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6369230 [patent_doc_number] => 20020059486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Shared component clock protection for multicore DSP device' [patent_app_type] => new [patent_app_number] => 10/008699 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3970 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059486.pdf [firstpage_image] =>[orig_patent_app_number] => 10008699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5791512 [patent_doc_number] => 20020161992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Processor and reset control method for the processor' [patent_app_type] => new [patent_app_number] => 09/985766 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6135 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20020161992.pdf [firstpage_image] =>[orig_patent_app_number] => 09985766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6793452 [patent_doc_number] => 20030088796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Communication adapter' [patent_app_type] => new [patent_app_number] => 10/005969 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5250 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088796.pdf [firstpage_image] =>[orig_patent_app_number] => 10005969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6793420 [patent_doc_number] => 20030088764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Method of supporting multiple PDA systems on a notebook PC' [patent_app_type] => new [patent_app_number] => 09/985560 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1625 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20030088764.pdf [firstpage_image] =>[orig_patent_app_number] => 09985560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6425913 [patent_doc_number] => 20020184547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Device and method for selectively powering down integrated circuit blocks within a system on chip' [patent_app_type] => new [patent_app_number] => 10/008586 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3959 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184547.pdf [firstpage_image] =>[orig_patent_app_number] => 10008586 [rel_patent_id] =>[rel_patent_doc_number] =>)