
Tse W. Chen
Supervisory Patent Examiner (ID: 19256, Phone: (571)272-3672 , Office: P/3777 )
| Most Active Art Unit | 2116 |
| Art Unit(s) | 3777, 3791, 2116, 3793 |
| Total Applications | 339 |
| Issued Applications | 183 |
| Pending Applications | 27 |
| Abandoned Applications | 132 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 637528
[patent_doc_number] => 07130992
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Detecting insertion of removable media'
[patent_app_type] => utility
[patent_app_number] => 09/822684
[patent_app_country] => US
[patent_app_date] => 2001-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3774
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/130/07130992.pdf
[firstpage_image] =>[orig_patent_app_number] => 09822684
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/822684 | Detecting insertion of removable media | Mar 29, 2001 | Issued |
Array
(
[id] => 6562310
[patent_doc_number] => 20020138778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Controlling CPU core voltage to reduce power consumption'
[patent_app_type] => new
[patent_app_number] => 09/815074
[patent_app_country] => US
[patent_app_date] => 2001-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4240
[patent_no_of_claims] => 22
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[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20020138778.pdf
[firstpage_image] =>[orig_patent_app_number] => 09815074
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/815074 | Controlling CPU core voltage to reduce power consumption | Mar 21, 2001 | Abandoned |
Array
(
[id] => 6562299
[patent_doc_number] => 20020138777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Method and apparatus for saving power in pipelined processors'
[patent_app_type] => new
[patent_app_number] => 09/814321
[patent_app_country] => US
[patent_app_date] => 2001-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5289
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20020138777.pdf
[firstpage_image] =>[orig_patent_app_number] => 09814321
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/814321 | Method and apparatus for saving power in pipelined processors | Mar 20, 2001 | Issued |
Array
(
[id] => 7066782
[patent_doc_number] => 20010044907
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-22
[patent_title] => 'Information processing apparatus, power saving control method and recording medium for storing power saving control program'
[patent_app_type] => new
[patent_app_number] => 09/791826
[patent_app_country] => US
[patent_app_date] => 2001-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7484
[patent_no_of_claims] => 9
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[patent_words_short_claim] => 144
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20010044907.pdf
[firstpage_image] =>[orig_patent_app_number] => 09791826
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/791826 | Method, recording medium and apparatus for power saving control via detection of usage pattern based on stored history and accounting of a spin down cost | Feb 25, 2001 | Issued |
Array
(
[id] => 6893557
[patent_doc_number] => 20010015923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-23
[patent_title] => 'Data transfer technique'
[patent_app_type] => new
[patent_app_number] => 09/790938
[patent_app_country] => US
[patent_app_date] => 2001-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 5592
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[pdf_file] => publications/A1/0015/20010015923.pdf
[firstpage_image] =>[orig_patent_app_number] => 09790938
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/790938 | Parallel data transfer method and system of DDR divided data with associated transfer clock signal over three signal lines | Feb 21, 2001 | Issued |
Array
(
[id] => 6894551
[patent_doc_number] => 20010016917
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-23
[patent_title] => 'Method and configuration for supplying a clock signal to processor-controlled apparatuses'
[patent_app_type] => new
[patent_app_number] => 09/783515
[patent_app_country] => US
[patent_app_date] => 2001-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2319
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[pdf_file] => publications/A1/0016/20010016917.pdf
[firstpage_image] =>[orig_patent_app_number] => 09783515
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/783515 | Method and configuration for supplying a clock signal to processor-controlled apparatuses | Feb 13, 2001 | Abandoned |
Array
(
[id] => 1116711
[patent_doc_number] => 06804792
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-12
[patent_title] => 'Computer power management with converter for changing generated power mode commands for external devices'
[patent_app_type] => B2
[patent_app_number] => 09/779554
[patent_app_country] => US
[patent_app_date] => 2001-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5714
[patent_no_of_claims] => 15
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[pdf_file] => patents/06/804/06804792.pdf
[firstpage_image] =>[orig_patent_app_number] => 09779554
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/779554 | Computer power management with converter for changing generated power mode commands for external devices | Feb 8, 2001 | Issued |
Array
(
[id] => 6648843
[patent_doc_number] => 20020087854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'Diskless computer'
[patent_app_type] => new
[patent_app_number] => 09/752929
[patent_app_country] => US
[patent_app_date] => 2001-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2372
[patent_no_of_claims] => 19
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[pdf_file] => publications/A1/0087/20020087854.pdf
[firstpage_image] =>[orig_patent_app_number] => 09752929
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/752929 | Diskless computer | Jan 1, 2001 | Abandoned |
Array
(
[id] => 6649176
[patent_doc_number] => 20020087908
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'System and method for power loss notification'
[patent_app_type] => new
[patent_app_number] => 09/753798
[patent_app_country] => US
[patent_app_date] => 2001-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 4743
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[pdf_file] => publications/A1/0087/20020087908.pdf
[firstpage_image] =>[orig_patent_app_number] => 09753798
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/753798 | Communication system power loss notification via detection of reverse bias state of a diode based on a threshold voltage | Jan 1, 2001 | Issued |
Array
(
[id] => 1092935
[patent_doc_number] => 06829713
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-07
[patent_title] => 'CPU power management based on utilization with lowest performance mode at the mid-utilization range'
[patent_app_type] => B2
[patent_app_number] => 09/751759
[patent_app_country] => US
[patent_app_date] => 2000-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/06/829/06829713.pdf
[firstpage_image] =>[orig_patent_app_number] => 09751759
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/751759 | CPU power management based on utilization with lowest performance mode at the mid-utilization range | Dec 29, 2000 | Issued |
Array
(
[id] => 7598080
[patent_doc_number] => 07584373
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-09-01
[patent_title] => 'Low power subsystem for portable computers'
[patent_app_type] => utility
[patent_app_number] => 09/753326
[patent_app_country] => US
[patent_app_date] => 2000-12-29
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[pdf_file] => patents/07/584/07584373.pdf
[firstpage_image] =>[orig_patent_app_number] => 09753326
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/753326 | Low power subsystem for portable computers | Dec 28, 2000 | Issued |
Array
(
[id] => 6634438
[patent_doc_number] => 20020086719
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[patent_issue_date] => 2002-07-04
[patent_title] => 'Low power subsystem for portable computers'
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[patent_app_number] => 09/752644
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[firstpage_image] =>[orig_patent_app_number] => 09752644
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/752644 | Low power subsystem for portable computers | Dec 28, 2000 | Abandoned |
Array
(
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Array
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Array
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Array
(
[id] => 6649162
[patent_doc_number] => 20020087904
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[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'Method and apparatus for thermal sensitivity based dynamic power control'
[patent_app_type] => new
[patent_app_number] => 09/749792
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[pdf_file] => publications/A1/0087/20020087904.pdf
[firstpage_image] =>[orig_patent_app_number] => 09749792
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/749792 | Method and apparatus for thermal sensitivity based dynamic power control | Dec 27, 2000 | Abandoned |
Array
(
[id] => 992761
[patent_doc_number] => 06920569
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-07-19
[patent_title] => 'Device configured as stand-alone or slave based on detection of power supply in a powered data bus system'
[patent_app_type] => utility
[patent_app_number] => 09/720149
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[pdf_file] => patents/06/920/06920569.pdf
[firstpage_image] =>[orig_patent_app_number] => 09720149
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/720149 | Device configured as stand-alone or slave based on detection of power supply in a powered data bus system | Apr 24, 2000 | Issued |
Array
(
[id] => 1129716
[patent_doc_number] => 06795926
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-09-21
[patent_title] => 'Prevention of power state change in response to chassis intrusion when computer system is not in powered up power state'
[patent_app_type] => B1
[patent_app_number] => 09/322296
[patent_app_country] => US
[patent_app_date] => 1999-05-28
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[firstpage_image] =>[orig_patent_app_number] => 09322296
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/322296 | Prevention of power state change in response to chassis intrusion when computer system is not in powered up power state | May 27, 1999 | Issued |