
Tu Tu V. Ho
Examiner (ID: 15910)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2804 |
| Issued Applications | 2592 |
| Pending Applications | 124 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5066684
[patent_doc_number] => 20070187785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-16
[patent_title] => 'MAGNETIC MEMORY CELL AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/307658
[patent_app_country] => US
[patent_app_date] => 2006-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5042
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0187/20070187785.pdf
[firstpage_image] =>[orig_patent_app_number] => 11307658
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/307658 | MAGNETIC MEMORY CELL AND MANUFACTURING METHOD THEREOF | Feb 15, 2006 | Abandoned |
Array
(
[id] => 820864
[patent_doc_number] => 07408198
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Thin film transistor, thin film transistor array and repairing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/307540
[patent_app_country] => US
[patent_app_date] => 2006-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3441
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/408/07408198.pdf
[firstpage_image] =>[orig_patent_app_number] => 11307540
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/307540 | Thin film transistor, thin film transistor array and repairing method thereof | Feb 12, 2006 | Issued |
Array
(
[id] => 920105
[patent_doc_number] => 07321146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-22
[patent_title] => 'DRAM memory cell and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/352179
[patent_app_country] => US
[patent_app_date] => 2006-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 62
[patent_no_of_words] => 8394
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/321/07321146.pdf
[firstpage_image] =>[orig_patent_app_number] => 11352179
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/352179 | DRAM memory cell and method of manufacturing the same | Feb 9, 2006 | Issued |
Array
(
[id] => 411980
[patent_doc_number] => 07282784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-16
[patent_title] => 'Methods of manufacture of a via structure comprising a plurality of conductive elements and methods of forming multichip modules including such via structures'
[patent_app_type] => utility
[patent_app_number] => 11/351006
[patent_app_country] => US
[patent_app_date] => 2006-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 48
[patent_no_of_words] => 15611
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/282/07282784.pdf
[firstpage_image] =>[orig_patent_app_number] => 11351006
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/351006 | Methods of manufacture of a via structure comprising a plurality of conductive elements and methods of forming multichip modules including such via structures | Feb 7, 2006 | Issued |
Array
(
[id] => 5908951
[patent_doc_number] => 20060125011
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Memory with split gate devices and method of fabrication'
[patent_app_type] => utility
[patent_app_number] => 11/350230
[patent_app_country] => US
[patent_app_date] => 2006-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3576
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20060125011.pdf
[firstpage_image] =>[orig_patent_app_number] => 11350230
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/350230 | Memory with split gate devices and method of fabrication | Feb 6, 2006 | Issued |
Array
(
[id] => 5295540
[patent_doc_number] => 20090010466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-08
[patent_title] => 'Hearing Agent and a Related Method'
[patent_app_type] => utility
[patent_app_number] => 12/223516
[patent_app_country] => US
[patent_app_date] => 2006-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6904
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20090010466.pdf
[firstpage_image] =>[orig_patent_app_number] => 12223516
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/223516 | Hearing Agent and a Related Method | Feb 2, 2006 | Abandoned |
Array
(
[id] => 1076894
[patent_doc_number] => 07615406
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Electronic device package manufacturing method and electronic device package'
[patent_app_type] => utility
[patent_app_number] => 11/883166
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 8507
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/615/07615406.pdf
[firstpage_image] =>[orig_patent_app_number] => 11883166
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/883166 | Electronic device package manufacturing method and electronic device package | Jan 25, 2006 | Issued |
Array
(
[id] => 911271
[patent_doc_number] => 07329900
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-12
[patent_title] => 'Bonding strength testing device'
[patent_app_type] => utility
[patent_app_number] => 11/306900
[patent_app_country] => US
[patent_app_date] => 2006-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4109
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/329/07329900.pdf
[firstpage_image] =>[orig_patent_app_number] => 11306900
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306900 | Bonding strength testing device | Jan 15, 2006 | Issued |
Array
(
[id] => 377397
[patent_doc_number] => 07312498
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-12-25
[patent_title] => 'Nonvolatile semiconductor memory cell and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/331228
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 21
[patent_no_of_words] => 6122
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/312/07312498.pdf
[firstpage_image] =>[orig_patent_app_number] => 11331228
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/331228 | Nonvolatile semiconductor memory cell and method of manufacturing the same | Jan 12, 2006 | Issued |
Array
(
[id] => 440110
[patent_doc_number] => 07259395
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Dual panel type organic electroluminescent display device and manufacturing method for the same'
[patent_app_type] => utility
[patent_app_number] => 11/324265
[patent_app_country] => US
[patent_app_date] => 2006-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 43
[patent_no_of_words] => 7771
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 702
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259395.pdf
[firstpage_image] =>[orig_patent_app_number] => 11324265
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/324265 | Dual panel type organic electroluminescent display device and manufacturing method for the same | Jan 3, 2006 | Issued |
Array
(
[id] => 425467
[patent_doc_number] => 07271450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-18
[patent_title] => 'Dual-gate structure and method of fabricating integrated circuits having dual-gate structures'
[patent_app_type] => utility
[patent_app_number] => 11/303530
[patent_app_country] => US
[patent_app_date] => 2005-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3014
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/271/07271450.pdf
[firstpage_image] =>[orig_patent_app_number] => 11303530
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/303530 | Dual-gate structure and method of fabricating integrated circuits having dual-gate structures | Dec 15, 2005 | Issued |
Array
(
[id] => 5116942
[patent_doc_number] => 20070138656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Providing a metal layer in a semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 11/300720
[patent_app_country] => US
[patent_app_date] => 2005-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2307
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20070138656.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300720
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300720 | Providing a metal layer in a semiconductor package | Dec 14, 2005 | Issued |
Array
(
[id] => 5116930
[patent_doc_number] => 20070138644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Structure and method of making capped chip having discrete article assembled into vertical interconnect'
[patent_app_type] => utility
[patent_app_number] => 11/300900
[patent_app_country] => US
[patent_app_date] => 2005-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 16331
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20070138644.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300900
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300900 | Structure and method of making capped chip having discrete article assembled into vertical interconnect | Dec 14, 2005 | Abandoned |
Array
(
[id] => 6294970
[patent_doc_number] => 20100065885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-18
[patent_title] => 'SOI DEVICE WITH MORE IMMUNITY FROM STUBSTRATE VOLTAGE'
[patent_app_type] => utility
[patent_app_number] => 11/813018
[patent_app_country] => US
[patent_app_date] => 2005-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4836
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0065/20100065885.pdf
[firstpage_image] =>[orig_patent_app_number] => 11813018
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/813018 | SOI device with more immunity from substrate voltage | Dec 14, 2005 | Issued |
Array
(
[id] => 5908776
[patent_doc_number] => 20060124928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Integrated circuit disabling'
[patent_app_type] => utility
[patent_app_number] => 11/302620
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2707
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20060124928.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302620
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302620 | Integrated circuit disabling | Dec 13, 2005 | Abandoned |
Array
(
[id] => 5911361
[patent_doc_number] => 20060126423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'Memory element and memory device'
[patent_app_type] => utility
[patent_app_number] => 11/302781
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9154
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20060126423.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302781
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302781 | Memory element and memory device | Dec 13, 2005 | Issued |
Array
(
[id] => 904338
[patent_doc_number] => 07335955
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'ESD protection for passive integrated devices'
[patent_app_type] => utility
[patent_app_number] => 11/300710
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 25
[patent_no_of_words] => 5981
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/335/07335955.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300710
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300710 | ESD protection for passive integrated devices | Dec 13, 2005 | Issued |
Array
(
[id] => 349172
[patent_doc_number] => 07495290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Semiconductor devices and methods of manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 11/300050
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 8340
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/495/07495290.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300050
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300050 | Semiconductor devices and methods of manufacture thereof | Dec 13, 2005 | Issued |
Array
(
[id] => 5805200
[patent_doc_number] => 20060091553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Wiring board and method for producing same'
[patent_app_type] => utility
[patent_app_number] => 11/302582
[patent_app_country] => US
[patent_app_date] => 2005-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6347
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20060091553.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302582
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302582 | Wiring board and method for producing same | Dec 12, 2005 | Abandoned |
Array
(
[id] => 844073
[patent_doc_number] => 07388270
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-17
[patent_title] => 'Method of fabricating CMOS image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/301830
[patent_app_country] => US
[patent_app_date] => 2005-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2793
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/388/07388270.pdf
[firstpage_image] =>[orig_patent_app_number] => 11301830
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/301830 | Method of fabricating CMOS image sensor | Dec 11, 2005 | Issued |