
Tu Tu V. Ho
Examiner (ID: 15910)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2804 |
| Issued Applications | 2592 |
| Pending Applications | 124 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7396728
[patent_doc_number] => 20040104418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-03
[patent_title] => 'Transistor array and semiconductor memory configuration fabricated with the transistor array'
[patent_app_type] => new
[patent_app_number] => 10/718310
[patent_app_country] => US
[patent_app_date] => 2003-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3246
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[patent_words_short_claim] => 173
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20040104418.pdf
[firstpage_image] =>[orig_patent_app_number] => 10718310
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/718310 | Transistor array and semiconductor memory configuration fabricated with the transistor array | Nov 19, 2003 | Issued |
Array
(
[id] => 7323334
[patent_doc_number] => 20040251460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'DEVICE FOR SEATING SEMICONDUCTOR DEVICE IN SEMICONDUCTOR TEST HANDLER'
[patent_app_type] => new
[patent_app_number] => 10/713110
[patent_app_country] => US
[patent_app_date] => 2003-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3941
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[pdf_file] => publications/A1/0251/20040251460.pdf
[firstpage_image] =>[orig_patent_app_number] => 10713110
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/713110 | Device for seating semiconductor device in semiconductor test handler | Nov 16, 2003 | Issued |
Array
(
[id] => 7101420
[patent_doc_number] => 20050104146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'THIN FILM DEVICE AND A METHOD OF PROVIDING THERMAL ASSISTANCE THEREIN'
[patent_app_type] => utility
[patent_app_number] => 10/713510
[patent_app_country] => US
[patent_app_date] => 2003-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0104/20050104146.pdf
[firstpage_image] =>[orig_patent_app_number] => 10713510
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/713510 | Thin film device and a method of providing thermal assistance therein | Nov 13, 2003 | Issued |
Array
(
[id] => 1053796
[patent_doc_number] => 06858926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-22
[patent_title] => 'Stackable ceramic FBGA for high thermal applications'
[patent_app_type] => utility
[patent_app_number] => 10/706210
[patent_app_country] => US
[patent_app_date] => 2003-11-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/858/06858926.pdf
[firstpage_image] =>[orig_patent_app_number] => 10706210
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/706210 | Stackable ceramic FBGA for high thermal applications | Nov 11, 2003 | Issued |
Array
(
[id] => 1110909
[patent_doc_number] => 06806137
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-19
[patent_title] => 'Trench buried bit line memory devices and methods thereof'
[patent_app_type] => B2
[patent_app_number] => 10/705707
[patent_app_country] => US
[patent_app_date] => 2003-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 7493
[patent_no_of_claims] => 39
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[pdf_file] => patents/06/806/06806137.pdf
[firstpage_image] =>[orig_patent_app_number] => 10705707
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/705707 | Trench buried bit line memory devices and methods thereof | Nov 10, 2003 | Issued |
Array
(
[id] => 7219870
[patent_doc_number] => 20040155330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-12
[patent_title] => 'Semiconductor device and method of manufacturing the same, circuit board and electronic instrument'
[patent_app_type] => new
[patent_app_number] => 10/703570
[patent_app_country] => US
[patent_app_date] => 2003-11-10
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0155/20040155330.pdf
[firstpage_image] =>[orig_patent_app_number] => 10703570
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/703570 | Semiconductor device and method of manufacturing the same, circuit board and electronic instrument | Nov 9, 2003 | Issued |
Array
(
[id] => 1086442
[patent_doc_number] => 06831310
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-14
[patent_title] => 'Integrated circuit having multiple memory types and method of formation'
[patent_app_type] => B1
[patent_app_number] => 10/705504
[patent_app_country] => US
[patent_app_date] => 2003-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 6548
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/831/06831310.pdf
[firstpage_image] =>[orig_patent_app_number] => 10705504
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/705504 | Integrated circuit having multiple memory types and method of formation | Nov 9, 2003 | Issued |
Array
(
[id] => 7288919
[patent_doc_number] => 20040110013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'Method of increasing mechanical properties of semiconductor substrates'
[patent_app_type] => new
[patent_app_number] => 10/703803
[patent_app_country] => US
[patent_app_date] => 2003-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3813
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[pdf_file] => publications/A1/0110/20040110013.pdf
[firstpage_image] =>[orig_patent_app_number] => 10703803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/703803 | Method of increasing mechanical properties of semiconductor substrates | Nov 6, 2003 | Abandoned |
Array
(
[id] => 7375320
[patent_doc_number] => 20040178433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'DRAM memory cell and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/704514
[patent_app_country] => US
[patent_app_date] => 2003-11-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0178/20040178433.pdf
[firstpage_image] =>[orig_patent_app_number] => 10704514
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/704514 | DRAM memory cell and method of manufacturing the same | Nov 6, 2003 | Issued |
Array
(
[id] => 6915496
[patent_doc_number] => 20050093057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Common spacer dual gate memory cell and method for forming a nonvolatile memory array'
[patent_app_type] => utility
[patent_app_number] => 10/698514
[patent_app_country] => US
[patent_app_date] => 2003-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[patent_no_of_words] => 4533
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[pdf_file] => publications/A1/0093/20050093057.pdf
[firstpage_image] =>[orig_patent_app_number] => 10698514
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/698514 | Common spacer dual gate memory cell and method for forming a nonvolatile memory array | Nov 2, 2003 | Abandoned |
Array
(
[id] => 1081412
[patent_doc_number] => 06836021
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-28
[patent_title] => 'Semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 10/698410
[patent_app_country] => US
[patent_app_date] => 2003-11-03
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/836/06836021.pdf
[firstpage_image] =>[orig_patent_app_number] => 10698410
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/698410 | Semiconductor device | Nov 2, 2003 | Issued |
Array
(
[id] => 6915449
[patent_doc_number] => 20050093010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'IC PACKAGE WITH STACKED SHEET METAL SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 10/697610
[patent_app_country] => US
[patent_app_date] => 2003-10-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0093/20050093010.pdf
[firstpage_image] =>[orig_patent_app_number] => 10697610
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/697610 | IC package with stacked sheet metal substrate | Oct 30, 2003 | Issued |
Array
(
[id] => 1056847
[patent_doc_number] => 06855984
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-02-15
[patent_title] => 'Process to reduce gate edge drain leakage in semiconductor devices'
[patent_app_type] => utility
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[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/855/06855984.pdf
[firstpage_image] =>[orig_patent_app_number] => 10697510
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/697510 | Process to reduce gate edge drain leakage in semiconductor devices | Oct 29, 2003 | Issued |
Array
(
[id] => 7058889
[patent_doc_number] => 20050001248
[patent_country] => US
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[patent_issue_date] => 2005-01-06
[patent_title] => 'Pinned photodiode structure and method of formation'
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[patent_app_number] => 10/695160
[patent_app_country] => US
[patent_app_date] => 2003-10-29
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[pdf_file] => publications/A1/0001/20050001248.pdf
[firstpage_image] =>[orig_patent_app_number] => 10695160
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/695160 | Pinned photodiode structure and method of formation | Oct 28, 2003 | Issued |
Array
(
[id] => 712251
[patent_doc_number] => 07057258
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[patent_kind] => B2
[patent_issue_date] => 2006-06-06
[patent_title] => 'Resistive memory device and method for making the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/695710 | Resistive memory device and method for making the same | Oct 28, 2003 | Issued |
Array
(
[id] => 7414689
[patent_doc_number] => 20040159867
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[patent_title] => 'MULTI-LAYER CONDUCTIVE MEMORY DEVICE'
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[firstpage_image] =>[orig_patent_app_number] => 10605757
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/605757 | Multi-layer conductive memory device | Oct 22, 2003 | Issued |
Array
(
[id] => 7154297
[patent_doc_number] => 20050082559
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[patent_title] => 'Mask and method for using the mask in lithographic processing'
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[firstpage_image] =>[orig_patent_app_number] => 10685004
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/685004 | Mask and method for using the mask in lithographic processing | Oct 14, 2003 | Issued |
Array
(
[id] => 7159371
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[firstpage_image] =>[orig_patent_app_number] => 10684910
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/684910 | Low leakage schottky diode | Oct 13, 2003 | Issued |
Array
(
[id] => 1086545
[patent_doc_number] => 06831359
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[patent_title] => 'Power semiconductor module'
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[firstpage_image] =>[orig_patent_app_number] => 10684310
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/684310 | Power semiconductor module | Oct 10, 2003 | Issued |
Array
(
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[pdf_file] => publications/A1/0124/20040124536.pdf
[firstpage_image] =>[orig_patent_app_number] => 10682110
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/682110 | Semiconductor device | Oct 9, 2003 | Abandoned |