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Tu Tu V. Ho

Examiner (ID: 15910)

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6694873 [patent_doc_number] => 20030107067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Matrix-addressable array of integrated transistor/memory structures' [patent_app_type] => new [patent_app_number] => 10/300802 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4417 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107067.pdf [firstpage_image] =>[orig_patent_app_number] => 10300802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300802
Matrix-addressable array of integrated transistor/memory structures Nov 20, 2002 Issued
Array ( [id] => 1225155 [patent_doc_number] => 06700181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Method and system for broadband transition from IC package to motherboard' [patent_app_type] => B1 [patent_app_number] => 10/300810 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3915 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700181.pdf [firstpage_image] =>[orig_patent_app_number] => 10300810 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300810
Method and system for broadband transition from IC package to motherboard Nov 18, 2002 Issued
Array ( [id] => 1189803 [patent_doc_number] => 06734465 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'Nanocrystalline based phosphors and photonic structures for solid state lighting' [patent_app_type] => B1 [patent_app_number] => 10/299410 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5681 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734465.pdf [firstpage_image] =>[orig_patent_app_number] => 10299410 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/299410
Nanocrystalline based phosphors and photonic structures for solid state lighting Nov 18, 2002 Issued
Array ( [id] => 7459225 [patent_doc_number] => 20040094786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'TRENCH BURIED BIT LINE MEMORY DEVICES AND METHODS THEREOF' [patent_app_type] => new [patent_app_number] => 10/295106 [patent_app_country] => US [patent_app_date] => 2002-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7576 [patent_no_of_claims] => 92 [patent_no_of_ind_claims] => 35 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20040094786.pdf [firstpage_image] =>[orig_patent_app_number] => 10295106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/295106
Trench buried bit line memory devices Nov 14, 2002 Issued
Array ( [id] => 7353600 [patent_doc_number] => 20040089890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'One transistor DRAM cell structure and method for forming' [patent_app_type] => new [patent_app_number] => 10/290904 [patent_app_country] => US [patent_app_date] => 2002-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3039 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20040089890.pdf [firstpage_image] =>[orig_patent_app_number] => 10290904 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/290904
One transistor DRAM cell structure and method for forming Nov 7, 2002 Issued
Array ( [id] => 6817892 [patent_doc_number] => 20030068850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Semiconductor device, method of manufacturing semiconductor device, resin molding die, and semiconductor manufacturing system' [patent_app_type] => new [patent_app_number] => 10/288536 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14989 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20030068850.pdf [firstpage_image] =>[orig_patent_app_number] => 10288536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288536
Semiconductor device, method of manufacturing semiconductor device, resin molding die, and semiconductor manufacturing system Nov 5, 2002 Abandoned
Array ( [id] => 1218077 [patent_doc_number] => 06707132 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'High performance Si-Ge device module with CMOS technology' [patent_app_type] => B1 [patent_app_number] => 10/288410 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2226 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707132.pdf [firstpage_image] =>[orig_patent_app_number] => 10288410 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288410
High performance Si-Ge device module with CMOS technology Nov 4, 2002 Issued
Array ( [id] => 6718653 [patent_doc_number] => 20030052340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Magnetic shielding for integrated circuits' [patent_app_type] => new [patent_app_number] => 10/285554 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2879 [patent_no_of_claims] => 96 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20030052340.pdf [firstpage_image] =>[orig_patent_app_number] => 10285554 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285554
Magnetic shielding for integrated circuits Oct 31, 2002 Issued
Array ( [id] => 6867732 [patent_doc_number] => 20030080421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Semiconductor device, its manufacturing process, and its inspecting method' [patent_app_type] => new [patent_app_number] => 10/282012 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5037 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080421.pdf [firstpage_image] =>[orig_patent_app_number] => 10282012 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/282012
Semiconductor device having contact opening smaller than test probe, and manufacturing process and inspecting method thereof Oct 28, 2002 Issued
Array ( [id] => 1017963 [patent_doc_number] => 06890857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Semiconductor device having a multilayer wiring structure and pad electrodes protected from corrosion, and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/281162 [patent_app_country] => US [patent_app_date] => 2002-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 63 [patent_no_of_words] => 13503 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/890/06890857.pdf [firstpage_image] =>[orig_patent_app_number] => 10281162 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/281162
Semiconductor device having a multilayer wiring structure and pad electrodes protected from corrosion, and method for fabricating the same Oct 27, 2002 Issued
Array ( [id] => 7623734 [patent_doc_number] => 06725443 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Integrated circuit template cell system and method' [patent_app_type] => B1 [patent_app_number] => 10/280978 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3189 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725443.pdf [firstpage_image] =>[orig_patent_app_number] => 10280978 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/280978
Integrated circuit template cell system and method Oct 23, 2002 Issued
Array ( [id] => 6671848 [patent_doc_number] => 20030057451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Aggregate of Semicnductor micro-needles and method of manufacturing the same, and semiconductor apparatus and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/274910 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 14997 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057451.pdf [firstpage_image] =>[orig_patent_app_number] => 10274910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/274910
Aggregate of semiconductor micro-needles and method of manufacturing the same, and semiconductor apparatus and method of manufacturing the same Oct 21, 2002 Issued
Array ( [id] => 1254250 [patent_doc_number] => 06670664 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Single transistor random access memory (1T-RAM) cell with dual threshold voltages' [patent_app_type] => B1 [patent_app_number] => 10/279809 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 3790 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670664.pdf [firstpage_image] =>[orig_patent_app_number] => 10279809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279809
Single transistor random access memory (1T-RAM) cell with dual threshold voltages Oct 21, 2002 Issued
Array ( [id] => 6674397 [patent_doc_number] => 20030060000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument' [patent_app_type] => new [patent_app_number] => 10/273885 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9582 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20030060000.pdf [firstpage_image] =>[orig_patent_app_number] => 10273885 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/273885
Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument Oct 20, 2002 Issued
Array ( [id] => 1149918 [patent_doc_number] => 06774425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Metal-insulator-metal capacitor and a method for producing same' [patent_app_type] => B2 [patent_app_number] => 10/221010 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2996 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774425.pdf [firstpage_image] =>[orig_patent_app_number] => 10221010 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/221010
Metal-insulator-metal capacitor and a method for producing same Oct 14, 2002 Issued
Array ( [id] => 1044069 [patent_doc_number] => 06867446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/268709 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6993 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867446.pdf [firstpage_image] =>[orig_patent_app_number] => 10268709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268709
Semiconductor memory device Oct 10, 2002 Issued
Array ( [id] => 1197798 [patent_doc_number] => 06727566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'TRANSPARENT SUBSTRATE WITH CONDUCTIVE MULTILAYER ANTI REFLECTION FILM, TRANSPARENT TOUCH PANEL USING THE TRANSPARENT SUBSTRATE WITH MULTILAYER ANTI REFLECTION FILM AND ELECTRONIC APPARATUS USING THE TOUCH PANEL' [patent_app_type] => B1 [patent_app_number] => 10/148310 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 10010 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727566.pdf [firstpage_image] =>[orig_patent_app_number] => 10148310 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/148310
TRANSPARENT SUBSTRATE WITH CONDUCTIVE MULTILAYER ANTI REFLECTION FILM, TRANSPARENT TOUCH PANEL USING THE TRANSPARENT SUBSTRATE WITH MULTILAYER ANTI REFLECTION FILM AND ELECTRONIC APPARATUS USING THE TOUCH PANEL Oct 9, 2002 Issued
Array ( [id] => 6692767 [patent_doc_number] => 20030040199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Photo-assisted remote plasma apparatus and method' [patent_app_type] => new [patent_app_number] => 10/265910 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4599 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20030040199.pdf [firstpage_image] =>[orig_patent_app_number] => 10265910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265910
Photo-assisted remote plasma apparatus and method Oct 7, 2002 Issued
Array ( [id] => 7433651 [patent_doc_number] => 20040065912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Electrically programmable nonvolatile variable capacitor' [patent_app_type] => new [patent_app_number] => 10/267010 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8290 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20040065912.pdf [firstpage_image] =>[orig_patent_app_number] => 10267010 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/267010
Electrically programmable nonvolatile variable capacitor Oct 7, 2002 Issued
Array ( [id] => 1178453 [patent_doc_number] => 06747310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Flash memory cells with separated self-aligned select and erase gates, and process of fabrication' [patent_app_type] => B2 [patent_app_number] => 10/267014 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6078 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747310.pdf [firstpage_image] =>[orig_patent_app_number] => 10267014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/267014
Flash memory cells with separated self-aligned select and erase gates, and process of fabrication Oct 6, 2002 Issued
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