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Tu Tu V. Ho

Examiner (ID: 15910)

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6855418 [patent_doc_number] => 20030128919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Device integrated antenna for use in resonant and non-resonant modes and method' [patent_app_type] => new [patent_app_number] => 10/265935 [patent_app_country] => US [patent_app_date] => 2002-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12318 [patent_no_of_claims] => 87 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128919.pdf [firstpage_image] =>[orig_patent_app_number] => 10265935 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265935
Device integrated antenna for use in resonant and non-resonant modes and method Oct 4, 2002 Issued
Array ( [id] => 1176227 [patent_doc_number] => 06750555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor SRAM having linear diffusion regions' [patent_app_type] => B2 [patent_app_number] => 10/263914 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6904 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750555.pdf [firstpage_image] =>[orig_patent_app_number] => 10263914 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263914
Semiconductor SRAM having linear diffusion regions Oct 2, 2002 Issued
Array ( [id] => 7278790 [patent_doc_number] => 20040061167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Method of improving erase efficiency and a non-volatile memory cell made thereby' [patent_app_type] => new [patent_app_number] => 10/263004 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6408 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061167.pdf [firstpage_image] =>[orig_patent_app_number] => 10263004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263004
Method of improving erase efficiency and a non-volatile memory cell made thereby Sep 30, 2002 Abandoned
Array ( [id] => 6837169 [patent_doc_number] => 20030034509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Integrated circuit device including a layered superlattice material with an interface buffer layer' [patent_app_type] => new [patent_app_number] => 10/262003 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8348 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034509.pdf [firstpage_image] =>[orig_patent_app_number] => 10262003 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262003
Integrated circuit device including a layered superlattice material with an interface buffer layer Sep 29, 2002 Issued
Array ( [id] => 6742984 [patent_doc_number] => 20030020167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Semiconductor device having a capacitor and a metal interconnect layer with tungsten as a main constituent material and containing molybdenum' [patent_app_type] => new [patent_app_number] => 10/252685 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4047 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020167.pdf [firstpage_image] =>[orig_patent_app_number] => 10252685 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/252685
Semiconductor device having a capacitor and a metal interconnect layer with tungsten as a main constituent material and containing molybdenum Sep 23, 2002 Issued
Array ( [id] => 6671968 [patent_doc_number] => 20030057571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Wiring modeling technique' [patent_app_type] => new [patent_app_number] => 10/252610 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5848 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057571.pdf [firstpage_image] =>[orig_patent_app_number] => 10252610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/252610
Wiring modeling technique Sep 23, 2002 Issued
Array ( [id] => 1102711 [patent_doc_number] => 06815783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Single transistor type magnetic random access memory device and method of operating and manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 10/252532 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3342 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815783.pdf [firstpage_image] =>[orig_patent_app_number] => 10252532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/252532
Single transistor type magnetic random access memory device and method of operating and manufacturing the same Sep 23, 2002 Issued
Array ( [id] => 7445888 [patent_doc_number] => 20040051166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Shielding line system for an integrated circuit' [patent_app_type] => new [patent_app_number] => 10/246004 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2406 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051166.pdf [firstpage_image] =>[orig_patent_app_number] => 10246004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246004
Shielding line system for an integrated circuit Sep 17, 2002 Abandoned
Array ( [id] => 6671916 [patent_doc_number] => 20030057519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => new [patent_app_number] => 10/245410 [patent_app_country] => US [patent_app_date] => 2002-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1513 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057519.pdf [firstpage_image] =>[orig_patent_app_number] => 10245410 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245410
Semiconductor device having polycrystalline silicon film resistor and manufacturing method therefor Sep 16, 2002 Issued
Array ( [id] => 6671859 [patent_doc_number] => 20030057462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Ferroelectric memory device and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/245004 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057462.pdf [firstpage_image] =>[orig_patent_app_number] => 10245004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245004
Ferroelectric memory device and method of fabricating the same Sep 15, 2002 Issued
Array ( [id] => 6955602 [patent_doc_number] => 20050211972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Organic field effect transistor with off-set threshold voltage and the use thereof' [patent_app_type] => utility [patent_app_number] => 10/498610 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1212 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20050211972.pdf [firstpage_image] =>[orig_patent_app_number] => 10498610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/498610
Organic field effect transistor with off-set threshold voltage and the use thereof Sep 11, 2002 Issued
Array ( [id] => 6671842 [patent_doc_number] => 20030057445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/238710 [patent_app_country] => US [patent_app_date] => 2002-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8927 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057445.pdf [firstpage_image] =>[orig_patent_app_number] => 10238710 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238710
Semiconductor device and method for fabricating the same Sep 10, 2002 Issued
Array ( [id] => 6867702 [patent_doc_number] => 20030080391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Magnetic memory device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/235810 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6633 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080391.pdf [firstpage_image] =>[orig_patent_app_number] => 10235810 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/235810
Magnetic memory device and manufacturing method thereof Sep 5, 2002 Issued
Array ( [id] => 6748011 [patent_doc_number] => 20030042531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Flash memory element and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/234501 [patent_app_country] => US [patent_app_date] => 2002-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4491 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042531.pdf [firstpage_image] =>[orig_patent_app_number] => 10234501 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/234501
Flash memory element and manufacturing method thereof Sep 3, 2002 Issued
Array ( [id] => 1182129 [patent_doc_number] => 06740948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Magnetic shielding for reducing magnetic interference' [patent_app_type] => B2 [patent_app_number] => 10/233110 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 42 [patent_no_of_words] => 8279 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740948.pdf [firstpage_image] =>[orig_patent_app_number] => 10233110 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233110
Magnetic shielding for reducing magnetic interference Aug 29, 2002 Issued
Array ( [id] => 1106151 [patent_doc_number] => 06812517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Dielectric storage memory cell having high permittivity top dielectric and method therefor' [patent_app_type] => B2 [patent_app_number] => 10/230810 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2100 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812517.pdf [firstpage_image] =>[orig_patent_app_number] => 10230810 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230810
Dielectric storage memory cell having high permittivity top dielectric and method therefor Aug 28, 2002 Issued
Array ( [id] => 785778 [patent_doc_number] => 06989603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'nF-Opening Aiv Structures' [patent_app_type] => utility [patent_app_number] => 10/230610 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 275 [patent_no_of_words] => 24266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989603.pdf [firstpage_image] =>[orig_patent_app_number] => 10230610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230610
nF-Opening Aiv Structures Aug 27, 2002 Issued
Array ( [id] => 1344075 [patent_doc_number] => 06590266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => '2-bit mask ROM device and fabrication method thereof' [patent_app_type] => B1 [patent_app_number] => 10/064906 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2562 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/590/06590266.pdf [firstpage_image] =>[orig_patent_app_number] => 10064906 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064906
2-bit mask ROM device and fabrication method thereof Aug 27, 2002 Issued
Array ( [id] => 1276820 [patent_doc_number] => 06649971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Nitride read-only memory cell for improving second-bit effect and method for making thereof' [patent_app_type] => B1 [patent_app_number] => 10/064905 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1934 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649971.pdf [firstpage_image] =>[orig_patent_app_number] => 10064905 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064905
Nitride read-only memory cell for improving second-bit effect and method for making thereof Aug 27, 2002 Issued
Array ( [id] => 7130170 [patent_doc_number] => 20040041199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'NON-VOLATILE MEMORY TRANSISTOR ARRAY IMPLEMENTING \"H\" SHAPED SOURCE/DRAIN REGIONS AND METHOD FOR FABRICATING SAME' [patent_app_type] => new [patent_app_number] => 10/233310 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5989 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041199.pdf [firstpage_image] =>[orig_patent_app_number] => 10233310 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233310
Non-volatile memory transistor array implementing H shaped source/drain regions and method for fabricating same Aug 27, 2002 Issued
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