Search

Tu Tu V. Ho

Examiner (ID: 15910)

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1163699 [patent_doc_number] => 06765822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Memory device' [patent_app_type] => B2 [patent_app_number] => 10/195370 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4739 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765822.pdf [firstpage_image] =>[orig_patent_app_number] => 10195370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195370
Memory device Jul 15, 2002 Issued
Array ( [id] => 6390137 [patent_doc_number] => 20020180672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'SEMICONDUCTOR DISPLAY DEVICE' [patent_app_type] => new [patent_app_number] => 10/195521 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 27638 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20020180672.pdf [firstpage_image] =>[orig_patent_app_number] => 10195521 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195521
Semiconductor display device Jul 15, 2002 Issued
Array ( [id] => 1284242 [patent_doc_number] => 06642549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Method of forming a window for a gallium nitride light emitting diode' [patent_app_type] => B2 [patent_app_number] => 10/197614 [patent_app_country] => US [patent_app_date] => 2002-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1439 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642549.pdf [firstpage_image] =>[orig_patent_app_number] => 10197614 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/197614
Method of forming a window for a gallium nitride light emitting diode Jul 14, 2002 Issued
Array ( [id] => 6867740 [patent_doc_number] => 20030080429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/192610 [patent_app_country] => US [patent_app_date] => 2002-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12289 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080429.pdf [firstpage_image] =>[orig_patent_app_number] => 10192610 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/192610
Semiconductor device having S/D to S/D connection and isolation region between two semiconductor elements Jul 10, 2002 Issued
Array ( [id] => 1207018 [patent_doc_number] => 06717203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Compact nonvolatile memory using substrate hot carrier injection' [patent_app_type] => B2 [patent_app_number] => 10/192310 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 0 [patent_no_of_words] => 4077 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717203.pdf [firstpage_image] =>[orig_patent_app_number] => 10192310 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/192310
Compact nonvolatile memory using substrate hot carrier injection Jul 9, 2002 Issued
Array ( [id] => 6850338 [patent_doc_number] => 20030142540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Thin film magnetic memory device with high-accuracy data read structure having a reduced number of circuit elements' [patent_app_type] => new [patent_app_number] => 10/190668 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142540.pdf [firstpage_image] =>[orig_patent_app_number] => 10190668 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190668
Thin film magnetic memory device with high-accuracy data read structure having a reduced number of circuit elements Jul 8, 2002 Issued
Array ( [id] => 6855112 [patent_doc_number] => 20030128613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Semiconductor memory device capable of measuring a period of an internally produced periodic signal' [patent_app_type] => new [patent_app_number] => 10/190669 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10943 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128613.pdf [firstpage_image] =>[orig_patent_app_number] => 10190669 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190669
Semiconductor memory device capable of measuring a period of an internally produced periodic signal Jul 8, 2002 Abandoned
Array ( [id] => 6107221 [patent_doc_number] => 20020171151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Method for forming interconnects on semiconductor substrates and structures formed' [patent_app_type] => new [patent_app_number] => 10/191015 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5576 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20020171151.pdf [firstpage_image] =>[orig_patent_app_number] => 10191015 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191015
Method for forming interconnects on semiconductor substrates and structures formed Jul 7, 2002 Issued
Array ( [id] => 1185319 [patent_doc_number] => 06738290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/191673 [patent_app_country] => US [patent_app_date] => 2002-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4765 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738290.pdf [firstpage_image] =>[orig_patent_app_number] => 10191673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191673
Semiconductor memory device Jul 7, 2002 Issued
Array ( [id] => 1208653 [patent_doc_number] => 06717858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays' [patent_app_type] => B2 [patent_app_number] => 10/190069 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7471 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717858.pdf [firstpage_image] =>[orig_patent_app_number] => 10190069 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190069
Non-volatile semiconductor memory device in which one page is set for a plurality of memory cell arrays Jul 2, 2002 Issued
Array ( [id] => 1212474 [patent_doc_number] => 06714448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-30 [patent_title] => 'Method of programming a multi-level memory device' [patent_app_type] => B2 [patent_app_number] => 10/190374 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4190 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/714/06714448.pdf [firstpage_image] =>[orig_patent_app_number] => 10190374 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190374
Method of programming a multi-level memory device Jul 1, 2002 Issued
Array ( [id] => 1122905 [patent_doc_number] => 06798712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Wordline latching in semiconductor memories' [patent_app_type] => B2 [patent_app_number] => 10/190372 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4186 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798712.pdf [firstpage_image] =>[orig_patent_app_number] => 10190372 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190372
Wordline latching in semiconductor memories Jul 1, 2002 Issued
Array ( [id] => 1212571 [patent_doc_number] => 06714469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-30 [patent_title] => 'On-chip compression of charge distribution data' [patent_app_type] => B2 [patent_app_number] => 10/190370 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6283 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/714/06714469.pdf [firstpage_image] =>[orig_patent_app_number] => 10190370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190370
On-chip compression of charge distribution data Jul 1, 2002 Issued
Array ( [id] => 1284339 [patent_doc_number] => 06642566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Asymmetric inside spacer for vertical transistor' [patent_app_type] => B1 [patent_app_number] => 10/195601 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2355 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642566.pdf [firstpage_image] =>[orig_patent_app_number] => 10195601 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195601
Asymmetric inside spacer for vertical transistor Jun 27, 2002 Issued
Array ( [id] => 1281400 [patent_doc_number] => 06646336 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Wearable silicon chip' [patent_app_type] => B1 [patent_app_number] => 10/184510 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2000 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646336.pdf [firstpage_image] =>[orig_patent_app_number] => 10184510 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184510
Wearable silicon chip Jun 27, 2002 Issued
Array ( [id] => 7611875 [patent_doc_number] => 06903964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'MRAM architecture with electrically isolated read and write circuitry' [patent_app_type] => utility [patent_app_number] => 10/185868 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 8067 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903964.pdf [firstpage_image] =>[orig_patent_app_number] => 10185868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185868
MRAM architecture with electrically isolated read and write circuitry Jun 27, 2002 Issued
Array ( [id] => 1302222 [patent_doc_number] => 06624461 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Memory device' [patent_app_type] => B1 [patent_app_number] => 10/089910 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3960 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624461.pdf [firstpage_image] =>[orig_patent_app_number] => 10089910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/089910
Memory device Jun 26, 2002 Issued
Array ( [id] => 1284612 [patent_doc_number] => 06642603 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Same conductivity type highly-doped regions for antifuse memory cell' [patent_app_type] => B1 [patent_app_number] => 10/185515 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642603.pdf [firstpage_image] =>[orig_patent_app_number] => 10185515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185515
Same conductivity type highly-doped regions for antifuse memory cell Jun 26, 2002 Issued
Array ( [id] => 1416793 [patent_doc_number] => 06538927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Semiconductor storage device and production method thereof' [patent_app_type] => B1 [patent_app_number] => 10/183701 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6330 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538927.pdf [firstpage_image] =>[orig_patent_app_number] => 10183701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183701
Semiconductor storage device and production method thereof Jun 25, 2002 Issued
Array ( [id] => 6823794 [patent_doc_number] => 20030234416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Capacitor for a semiconductor device and method for fabrication therefor' [patent_app_type] => new [patent_app_number] => 10/180910 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2455 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20030234416.pdf [firstpage_image] =>[orig_patent_app_number] => 10180910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180910
Capacitor for a semiconductor device and method for fabrication therefor Jun 24, 2002 Issued
Menu