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Tu Tu V Ho

Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18975257 [patent_doc_number] => 20240055349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => SEMICONDUCTOR MEMORY STRUCTURE AND INTERCONNECT STRUCTURE OF SEMICONDUCTOR MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/492811 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492811 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/492811
Semiconductor memory structure and interconnect structure of semiconductor memory structure Oct 23, 2023 Issued
Array ( [id] => 19988596 [patent_doc_number] => 20250126818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => STRUCTURE AND METHOD FOR HIGH-VOLTAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/486561 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486561
STRUCTURE AND METHOD FOR HIGH-VOLTAGE DEVICE Oct 12, 2023 Pending
Array ( [id] => 19323377 [patent_doc_number] => 20240244925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/486452 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486452
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 12, 2023 Pending
Array ( [id] => 18945662 [patent_doc_number] => 20240040801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => MEMORY DEVICE AND SEMICONDUCTOR DIE, AND METHOD OF FABRICATING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/484466 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484466 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/484466
Memory device and semiconductor die, and method of fabricating memory device Oct 10, 2023 Issued
Array ( [id] => 19928447 [patent_doc_number] => 12302761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Magnetic tunnel junction devices [patent_app_type] => utility [patent_app_number] => 18/474173 [patent_app_country] => US [patent_app_date] => 2023-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 1074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474173 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/474173
Magnetic tunnel junction devices Sep 24, 2023 Issued
Array ( [id] => 19728707 [patent_doc_number] => 20250031458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF PREVENTING CHARGING DAMAGE THEREOF [patent_app_type] => utility [patent_app_number] => 18/242502 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242502 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242502
SEMICONDUCTOR STRUCTURE AND METHOD OF PREVENTING CHARGING DAMAGE THEREOF Sep 4, 2023 Pending
Array ( [id] => 19821130 [patent_doc_number] => 20250079337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => INTEGRATED CIRCUITS WITH TWO-SIDE METALLIZATION AND EXTERNAL STIFFENING LAYER AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 18/460863 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460863 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460863
INTEGRATED CIRCUITS WITH TWO-SIDE METALLIZATION AND EXTERNAL STIFFENING LAYER AND RELATED FABRICATION METHODS Sep 4, 2023 Pending
Array ( [id] => 19409122 [patent_doc_number] => 20240292633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/456519 [patent_app_country] => US [patent_app_date] => 2023-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456519 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/456519
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Aug 27, 2023 Pending
Array ( [id] => 18835414 [patent_doc_number] => 20230403941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/238520 [patent_app_country] => US [patent_app_date] => 2023-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18238520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/238520
Semiconductor device and method for fabricating the same Aug 26, 2023 Issued
Array ( [id] => 19926289 [patent_doc_number] => 12300583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Concealed gate terminal semiconductor packages and related methods [patent_app_type] => utility [patent_app_number] => 18/454970 [patent_app_country] => US [patent_app_date] => 2023-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 1210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18454970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/454970
Concealed gate terminal semiconductor packages and related methods Aug 23, 2023 Issued
Array ( [id] => 18823097 [patent_doc_number] => 20230397438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => MAGNETIC MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/452886 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452886 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452886
Magnetic memory devices Aug 20, 2023 Issued
Array ( [id] => 19806133 [patent_doc_number] => 20250072058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/452584 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452584 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452584
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Aug 20, 2023 Pending
Array ( [id] => 19071192 [patent_doc_number] => 20240105618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND LAYOUT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/450798 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450798 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/450798
SEMICONDUCTOR STRUCTURE AND LAYOUT STRUCTURE Aug 15, 2023 Pending
Array ( [id] => 19255295 [patent_doc_number] => 20240206292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/450828 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/450828
DISPLAY DEVICE Aug 15, 2023 Pending
Array ( [id] => 18991329 [patent_doc_number] => 20240063298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/234210 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234210
SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF Aug 14, 2023 Pending
Array ( [id] => 19773437 [patent_doc_number] => 20250054863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => FLEXIBLE TRACKPLAN FOR POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 18/448933 [patent_app_country] => US [patent_app_date] => 2023-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7283 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448933 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448933
FLEXIBLE TRACKPLAN FOR POWER DELIVERY Aug 11, 2023 Pending
Array ( [id] => 18975256 [patent_doc_number] => 20240055348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => THREE DIMENSIONAL INTEGRATED CIRCUIT WITH MONOLITHIC INTER-TIER VIAS (MIV) [patent_app_type] => utility [patent_app_number] => 18/447739 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447739
Three dimensional integrated circuit with monolithic inter-tier vias (MIV) Aug 9, 2023 Issued
Array ( [id] => 19906535 [patent_doc_number] => 12283554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Integrated circuit layout, integrated circuit, and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/447840 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 58 [patent_no_of_words] => 38323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447840
Integrated circuit layout, integrated circuit, and method for fabricating the same Aug 9, 2023 Issued
Array ( [id] => 19925089 [patent_doc_number] => 12299373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Reduced area standard cell abutment configurations [patent_app_type] => utility [patent_app_number] => 18/447187 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 6549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447187 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447187
Reduced area standard cell abutment configurations Aug 8, 2023 Issued
Array ( [id] => 19873777 [patent_doc_number] => 12266648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Package structure [patent_app_type] => utility [patent_app_number] => 18/363768 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 30 [patent_no_of_words] => 11638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363768 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363768
Package structure Aug 1, 2023 Issued
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