Application number | Title of the application | Filing Date | Status |
---|
08/087239 | BATTERY-INITIATED TOUCH-SENSITIVE POWER-UP | Aug 19, 1993 | Pending |
Array
(
[id] => 3533349
[patent_doc_number] => 05530904
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'System for tranferring data from one communication line to another using a multiplexer for selecting the lines and transferring data without intervention of a main processor'
[patent_app_type] => 1
[patent_app_number] => 8/107123
[patent_app_country] => US
[patent_app_date] => 1993-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3656
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 278
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530904.pdf
[firstpage_image] =>[orig_patent_app_number] => 107123
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/107123 | System for tranferring data from one communication line to another using a multiplexer for selecting the lines and transferring data without intervention of a main processor | Aug 16, 1993 | Issued |
Array
(
[id] => 3601955
[patent_doc_number] => 05517671
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'System for designating a plurality of I/O devices to a plurality of I/O channels and connecting and buffering the plurality of I/O channels to a single system bus'
[patent_app_type] => 1
[patent_app_number] => 8/100714
[patent_app_country] => US
[patent_app_date] => 1993-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5008
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 282
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/517/05517671.pdf
[firstpage_image] =>[orig_patent_app_number] => 100714
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/100714 | System for designating a plurality of I/O devices to a plurality of I/O channels and connecting and buffering the plurality of I/O channels to a single system bus | Jul 29, 1993 | Issued |
Array
(
[id] => 3503040
[patent_doc_number] => 05440733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Token train retrieval device for simultaneously determining nest level and checking condition of retrieval based on the determining nest level'
[patent_app_type] => 1
[patent_app_number] => 8/098076
[patent_app_country] => US
[patent_app_date] => 1993-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 9946
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 569
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440733.pdf
[firstpage_image] =>[orig_patent_app_number] => 098076
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/098076 | Token train retrieval device for simultaneously determining nest level and checking condition of retrieval based on the determining nest level | Jul 27, 1993 | Issued |
Array
(
[id] => 3526878
[patent_doc_number] => 05513368
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Computer I/O adapters for programmably varying states of peripheral devices without interfering with central processor operations'
[patent_app_type] => 1
[patent_app_number] => 8/093541
[patent_app_country] => US
[patent_app_date] => 1993-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 10099
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 353
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/513/05513368.pdf
[firstpage_image] =>[orig_patent_app_number] => 093541
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/093541 | Computer I/O adapters for programmably varying states of peripheral devices without interfering with central processor operations | Jul 15, 1993 | Issued |
Array
(
[id] => 3585878
[patent_doc_number] => 05539914
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Method and system for preprocessing data block headers during access of data in a data storage system'
[patent_app_type] => 1
[patent_app_number] => 8/077164
[patent_app_country] => US
[patent_app_date] => 1993-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3023
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/539/05539914.pdf
[firstpage_image] =>[orig_patent_app_number] => 077164
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/077164 | Method and system for preprocessing data block headers during access of data in a data storage system | Jun 13, 1993 | Issued |
Array
(
[id] => 3589616
[patent_doc_number] => 05524270
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'System for transferring data between asynchronous data buses with a data buffer interposed in between the buses for synchronization of devices timed by different clocks'
[patent_app_type] => 1
[patent_app_number] => 8/066694
[patent_app_country] => US
[patent_app_date] => 1993-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2701
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/524/05524270.pdf
[firstpage_image] =>[orig_patent_app_number] => 066694
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/066694 | System for transferring data between asynchronous data buses with a data buffer interposed in between the buses for synchronization of devices timed by different clocks | May 20, 1993 | Issued |
Array
(
[id] => 3506997
[patent_doc_number] => 05537654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'System for PCMCIA peripheral to execute instructions from shared memory where the system reset signal causes switching between modes of operation by alerting the starting address'
[patent_app_type] => 1
[patent_app_number] => 8/064304
[patent_app_country] => US
[patent_app_date] => 1993-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4028
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/537/05537654.pdf
[firstpage_image] =>[orig_patent_app_number] => 064304
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/064304 | System for PCMCIA peripheral to execute instructions from shared memory where the system reset signal causes switching between modes of operation by alerting the starting address | May 19, 1993 | Issued |
Array
(
[id] => 3569294
[patent_doc_number] => 05544315
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-06
[patent_title] => 'Network multimedia interface'
[patent_app_type] => 1
[patent_app_number] => 8/059836
[patent_app_country] => US
[patent_app_date] => 1993-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6276
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/544/05544315.pdf
[firstpage_image] =>[orig_patent_app_number] => 059836
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/059836 | Network multimedia interface | May 9, 1993 | Issued |
Array
(
[id] => 3588784
[patent_doc_number] => 05524217
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'System having different signal transfer modes for detecting and restoring logical levels and blocking operation when restored signal outputs are on a predetermined level'
[patent_app_type] => 1
[patent_app_number] => 8/051450
[patent_app_country] => US
[patent_app_date] => 1993-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 40
[patent_no_of_words] => 12534
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 328
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/524/05524217.pdf
[firstpage_image] =>[orig_patent_app_number] => 051450
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/051450 | System having different signal transfer modes for detecting and restoring logical levels and blocking operation when restored signal outputs are on a predetermined level | Apr 20, 1993 | Issued |
Array
(
[id] => 3638107
[patent_doc_number] => 05608872
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'System for allowing all remote computers to perform annotation on an image and replicating the annotated image on the respective displays of other comuters'
[patent_app_type] => 1
[patent_app_number] => 8/034313
[patent_app_country] => US
[patent_app_date] => 1993-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 7192
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/608/05608872.pdf
[firstpage_image] =>[orig_patent_app_number] => 034313
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/034313 | System for allowing all remote computers to perform annotation on an image and replicating the annotated image on the respective displays of other comuters | Mar 18, 1993 | Issued |
Array
(
[id] => 3567287
[patent_doc_number] => 05574951
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'System for providing a time division random access including a high speed unidirectional bus and a plurality of function cards connected in a daisy chain'
[patent_app_type] => 1
[patent_app_number] => 8/032576
[patent_app_country] => US
[patent_app_date] => 1993-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 5200
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/574/05574951.pdf
[firstpage_image] =>[orig_patent_app_number] => 032576
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/032576 | System for providing a time division random access including a high speed unidirectional bus and a plurality of function cards connected in a daisy chain | Mar 16, 1993 | Issued |
Array
(
[id] => 3503832
[patent_doc_number] => 05561818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Microprocessor and data processing system for data transfer using a register file'
[patent_app_type] => 1
[patent_app_number] => 8/031200
[patent_app_country] => US
[patent_app_date] => 1993-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5538
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/561/05561818.pdf
[firstpage_image] =>[orig_patent_app_number] => 031200
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/031200 | Microprocessor and data processing system for data transfer using a register file | Mar 11, 1993 | Issued |
08/023027 | TRANSACTION MANAGEMENT IN OBJECT ORIENTED SYSTEMS | Feb 24, 1993 | Abandoned |
Array
(
[id] => 3604827
[patent_doc_number] => 05568647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Serial control apparatus with a single chip select signal'
[patent_app_type] => 1
[patent_app_number] => 8/021676
[patent_app_country] => US
[patent_app_date] => 1993-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2389
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568647.pdf
[firstpage_image] =>[orig_patent_app_number] => 021676
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/021676 | Serial control apparatus with a single chip select signal | Feb 23, 1993 | Issued |
Array
(
[id] => 3567089
[patent_doc_number] => 05519883
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Interbus interface module'
[patent_app_type] => 1
[patent_app_number] => 8/018829
[patent_app_country] => US
[patent_app_date] => 1993-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 17373
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/519/05519883.pdf
[firstpage_image] =>[orig_patent_app_number] => 018829
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/018829 | Interbus interface module | Feb 17, 1993 | Issued |
Array
(
[id] => 3603089
[patent_doc_number] => 05586254
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'System for managing and operating a network by physically imaging the network'
[patent_app_type] => 1
[patent_app_number] => 8/018430
[patent_app_country] => US
[patent_app_date] => 1993-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 93
[patent_figures_cnt] => 122
[patent_no_of_words] => 28187
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/586/05586254.pdf
[firstpage_image] =>[orig_patent_app_number] => 018430
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/018430 | System for managing and operating a network by physically imaging the network | Feb 15, 1993 | Issued |
Array
(
[id] => 3603177
[patent_doc_number] => 05586260
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Method and apparatus for authenticating a client to a server in computer systems which support different security mechanisms'
[patent_app_type] => 1
[patent_app_number] => 8/017231
[patent_app_country] => US
[patent_app_date] => 1993-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3919
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/586/05586260.pdf
[firstpage_image] =>[orig_patent_app_number] => 017231
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/017231 | Method and apparatus for authenticating a client to a server in computer systems which support different security mechanisms | Feb 11, 1993 | Issued |
08/004145 | COMMON DATA LINK INTERFACE | Jan 12, 1993 | Abandoned |
Array
(
[id] => 3626179
[patent_doc_number] => 05566352
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'Register-read acknowledgment and prioritization for integration with a hardware-based interrupt acknowledgment mechanism'
[patent_app_type] => 1
[patent_app_number] => 8/000774
[patent_app_country] => US
[patent_app_date] => 1993-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 13689
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/566/05566352.pdf
[firstpage_image] =>[orig_patent_app_number] => 000774
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/000774 | Register-read acknowledgment and prioritization for integration with a hardware-based interrupt acknowledgment mechanism | Jan 3, 1993 | Issued |