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Tu Tu V Ho

Examiner (ID: 12393, Phone: (571)272-1778 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2683
Issued Applications
2433
Pending Applications
108
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3537979 [patent_doc_number] => 05504926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'Method for a host central processor and its associated controller to capture the selected one of a number of memory units via path control commands' [patent_app_type] => 1 [patent_app_number] => 7/949967 [patent_app_country] => US [patent_app_date] => 1992-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2734 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504926.pdf [firstpage_image] =>[orig_patent_app_number] => 949967 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/949967
Method for a host central processor and its associated controller to capture the selected one of a number of memory units via path control commands Sep 23, 1992 Issued
Array ( [id] => 3533927 [patent_doc_number] => 05530943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Method for producing an executable configuration of a system program loadable into a system memory area of a processor system' [patent_app_type] => 1 [patent_app_number] => 7/950653 [patent_app_country] => US [patent_app_date] => 1992-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2291 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530943.pdf [firstpage_image] =>[orig_patent_app_number] => 950653 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/950653
Method for producing an executable configuration of a system program loadable into a system memory area of a processor system Sep 22, 1992 Issued
Array ( [id] => 3121894 [patent_doc_number] => 05408612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Microprocessor system for selectively accessing a processor internal register when the processor has control of the bus and partial address identifying the register' [patent_app_type] => 1 [patent_app_number] => 7/942246 [patent_app_country] => US [patent_app_date] => 1992-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4390 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408612.pdf [firstpage_image] =>[orig_patent_app_number] => 942246 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/942246
Microprocessor system for selectively accessing a processor internal register when the processor has control of the bus and partial address identifying the register Sep 8, 1992 Issued
Array ( [id] => 4048208 [patent_doc_number] => 05857112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'System for achieving enhanced performance and data availability in a unified redundant array of disk drives by using user defined partitioning and level of redundancy' [patent_app_type] => 1 [patent_app_number] => 7/943410 [patent_app_country] => US [patent_app_date] => 1992-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6824 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857112.pdf [firstpage_image] =>[orig_patent_app_number] => 943410 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/943410
System for achieving enhanced performance and data availability in a unified redundant array of disk drives by using user defined partitioning and level of redundancy Sep 8, 1992 Issued
Array ( [id] => 3596587 [patent_doc_number] => 05581783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'System for capturing multimedia information using a hand writing stylus pen which performs signal-to-data conversion inside the pen and stores data in the memory inside the pen' [patent_app_type] => 1 [patent_app_number] => 7/941539 [patent_app_country] => US [patent_app_date] => 1992-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5256 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581783.pdf [firstpage_image] =>[orig_patent_app_number] => 941539 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/941539
System for capturing multimedia information using a hand writing stylus pen which performs signal-to-data conversion inside the pen and stores data in the memory inside the pen Sep 7, 1992 Issued
Array ( [id] => 3604288 [patent_doc_number] => 05568613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Dataframe bridge filter with communication node recordkeeping' [patent_app_type] => 1 [patent_app_number] => 7/939777 [patent_app_country] => US [patent_app_date] => 1992-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7799 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568613.pdf [firstpage_image] =>[orig_patent_app_number] => 939777 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/939777
Dataframe bridge filter with communication node recordkeeping Sep 2, 1992 Issued
07/937617 METHOD OF AND APPARATUS FOR PROVIDING PRESENTATION PRECEDENCE SERVICE Aug 27, 1992 Abandoned
Array ( [id] => 3627138 [patent_doc_number] => 05511226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'System for generating snoop addresses and conditionally generating source addresses whenever there is no snoop hit, the source addresses lagging behind the corresponding snoop addresses' [patent_app_type] => 1 [patent_app_number] => 7/935035 [patent_app_country] => US [patent_app_date] => 1992-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5114 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511226.pdf [firstpage_image] =>[orig_patent_app_number] => 935035 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/935035
System for generating snoop addresses and conditionally generating source addresses whenever there is no snoop hit, the source addresses lagging behind the corresponding snoop addresses Aug 24, 1992 Issued
Array ( [id] => 3579359 [patent_doc_number] => 05485583 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-16 [patent_title] => 'System for controlling data transfer by setting and decrementing a counter based on the number of error correction bits and transfer bit rate respectively' [patent_app_type] => 1 [patent_app_number] => 7/933439 [patent_app_country] => US [patent_app_date] => 1992-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/485/05485583.pdf [firstpage_image] =>[orig_patent_app_number] => 933439 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/933439
System for controlling data transfer by setting and decrementing a counter based on the number of error correction bits and transfer bit rate respectively Aug 19, 1992 Issued
Array ( [id] => 3458040 [patent_doc_number] => 05420983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-30 [patent_title] => 'Method for merging memory blocks, fetching associated disk chunk, merging memory blocks with the disk chunk, and writing the merged data' [patent_app_type] => 1 [patent_app_number] => 7/929085 [patent_app_country] => US [patent_app_date] => 1992-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4400 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/420/05420983.pdf [firstpage_image] =>[orig_patent_app_number] => 929085 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/929085
Method for merging memory blocks, fetching associated disk chunk, merging memory blocks with the disk chunk, and writing the merged data Aug 11, 1992 Issued
Array ( [id] => 3132620 [patent_doc_number] => 05450550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Parallel processing system for parallel prefetching of identical packet having two rendering commands and processing second command prior to completion of processing the first command' [patent_app_type] => 1 [patent_app_number] => 7/922675 [patent_app_country] => US [patent_app_date] => 1992-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7185 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450550.pdf [firstpage_image] =>[orig_patent_app_number] => 922675 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/922675
Parallel processing system for parallel prefetching of identical packet having two rendering commands and processing second command prior to completion of processing the first command Jul 29, 1992 Issued
Array ( [id] => 3474126 [patent_doc_number] => 05469547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Asynchronous bus interface for generating individual handshake signal for each data transfer based on associated propagation delay within a transaction' [patent_app_type] => 1 [patent_app_number] => 7/916327 [patent_app_country] => US [patent_app_date] => 1992-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7358 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469547.pdf [firstpage_image] =>[orig_patent_app_number] => 916327 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/916327
Asynchronous bus interface for generating individual handshake signal for each data transfer based on associated propagation delay within a transaction Jul 16, 1992 Issued
Array ( [id] => 3600764 [patent_doc_number] => 05553305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'System for synchronizing execution by a processing element of threads within a process using a state indicator' [patent_app_type] => 1 [patent_app_number] => 7/914686 [patent_app_country] => US [patent_app_date] => 1992-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 10833 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553305.pdf [firstpage_image] =>[orig_patent_app_number] => 914686 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/914686
System for synchronizing execution by a processing element of threads within a process using a state indicator Jul 14, 1992 Issued
Array ( [id] => 3488241 [patent_doc_number] => 05432911 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Controllers request access within one bus cycle causing hardware-wait to stall second controller when first controller is accessing and second controller is still requesting access' [patent_app_type] => 1 [patent_app_number] => 7/913690 [patent_app_country] => US [patent_app_date] => 1992-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 7253 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/432/05432911.pdf [firstpage_image] =>[orig_patent_app_number] => 913690 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/913690
Controllers request access within one bus cycle causing hardware-wait to stall second controller when first controller is accessing and second controller is still requesting access Jul 13, 1992 Issued
07/897335 METHOD AND APPARATUS FOR TUNABLE BANDWIDTH UTILIZATION OF A SHARED RESOURCE Jun 10, 1992 Abandoned
Array ( [id] => 3432196 [patent_doc_number] => 05479617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'System for combining and encoding first plurality of video signals to produce second plurality of signals and transmitting the signals via unshielded telephone cable to remote workstation' [patent_app_type] => 1 [patent_app_number] => 7/894418 [patent_app_country] => US [patent_app_date] => 1992-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3933 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479617.pdf [firstpage_image] =>[orig_patent_app_number] => 894418 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/894418
System for combining and encoding first plurality of video signals to produce second plurality of signals and transmitting the signals via unshielded telephone cable to remote workstation Jun 4, 1992 Issued
Array ( [id] => 3466656 [patent_doc_number] => 05452418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Method of using stream buffer to perform operation under normal operation mode and selectively switching to test mode to check data integrity during system operation' [patent_app_type] => 1 [patent_app_number] => 7/874071 [patent_app_country] => US [patent_app_date] => 1992-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10770 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/452/05452418.pdf [firstpage_image] =>[orig_patent_app_number] => 874071 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/874071
Method of using stream buffer to perform operation under normal operation mode and selectively switching to test mode to check data integrity during system operation Apr 23, 1992 Issued
Array ( [id] => 3420967 [patent_doc_number] => 05461718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-24 [patent_title] => 'System for sequential read of memory stream buffer detecting page mode cycles availability fetching data into a selected FIFO, and sending data without aceessing memory' [patent_app_type] => 1 [patent_app_number] => 7/874076 [patent_app_country] => US [patent_app_date] => 1992-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10726 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/461/05461718.pdf [firstpage_image] =>[orig_patent_app_number] => 874076 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/874076
System for sequential read of memory stream buffer detecting page mode cycles availability fetching data into a selected FIFO, and sending data without aceessing memory Apr 23, 1992 Issued
07/858784 OBJECT-ORIENTED HIERARCHICAL MODEL FOR OSI CONFIGURATION Mar 26, 1992 Abandoned
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