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Tu Tu V Ho

Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18791191 [patent_doc_number] => 20230380187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => MRAM MEMORY CELL LAYOUT FOR MINIMIZING BITCELL AREA [patent_app_type] => utility [patent_app_number] => 18/362817 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362817
MRAM memory cell layout for minimizing bitcell area Jul 30, 2023 Issued
Array ( [id] => 18776557 [patent_doc_number] => 20230371399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => UNDER-CUT VIA ELECTRODE FOR SUB 60NM ETCHLESS MRAM DEVICES BY DECOUPLING THE VIA ETCH PROCESS [patent_app_type] => utility [patent_app_number] => 18/360055 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360055
Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process Jul 26, 2023 Issued
Array ( [id] => 18757642 [patent_doc_number] => 20230361105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/355273 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355273
Integrated circuit device and method Jul 18, 2023 Issued
Array ( [id] => 20404448 [patent_doc_number] => 12494429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Power planning method, chip device, and non-transitory computer readable medium [patent_app_type] => utility [patent_app_number] => 18/223069 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18223069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/223069
Power planning method, chip device, and non-transitory computer readable medium Jul 17, 2023 Issued
Array ( [id] => 19886946 [patent_doc_number] => 12272678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/351471 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351471 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351471
Semiconductor package and manufacturing method thereof Jul 11, 2023 Issued
Array ( [id] => 19712653 [patent_doc_number] => 20250022795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => BACKSIDE LOCAL INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/349999 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349999 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/349999
BACKSIDE LOCAL INTERCONNECT Jul 10, 2023 Pending
Array ( [id] => 20404421 [patent_doc_number] => 12494402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/349685 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/349685
Semiconductor device Jul 9, 2023 Issued
Array ( [id] => 18745694 [patent_doc_number] => 20230354688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => METHOD FOR SELECTIVELY DEPOSITING A CONDUCTIVE COATING OVER A PATTERNING COATING AND DEVICE INCLUDING A CONDUCTIVE COATING [patent_app_type] => utility [patent_app_number] => 18/348282 [patent_app_country] => US [patent_app_date] => 2023-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -46 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/348282
Method for selectively depositing a conductive coating over a patterning coating and device including a conductive coating Jul 5, 2023 Issued
Array ( [id] => 20082536 [patent_doc_number] => 12356633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Semiconductor devices and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/347536 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2282 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347536 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347536
Semiconductor devices and method of forming the same Jul 4, 2023 Issued
Array ( [id] => 18743410 [patent_doc_number] => 20230352398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => Metal-Oxide-Metal (MOM) Capacitors for Integrated Circuit Monitoring [patent_app_type] => utility [patent_app_number] => 18/218197 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218197 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218197
Metal-oxide-metal (MOM) capacitors for integrated circuit monitoring Jul 4, 2023 Issued
Array ( [id] => 18745597 [patent_doc_number] => 20230354591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => INTEGRATED CIRCUIT LAYOUT AND METHOD [patent_app_type] => utility [patent_app_number] => 18/346700 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346700 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346700
Integrated circuit layout and method Jul 2, 2023 Issued
Array ( [id] => 18729345 [patent_doc_number] => 20230343641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => METHOD OF MAKING A THREE-DIMENSIONAL MEMORY DEVICE USING COMPOSITE HARD MASKS FOR FORMATION OF DEEP VIA OPENINGS [patent_app_type] => utility [patent_app_number] => 18/346520 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 69412 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346520
METHOD OF MAKING A THREE-DIMENSIONAL MEMORY DEVICE USING COMPOSITE HARD MASKS FOR FORMATION OF DEEP VIA OPENINGS Jul 2, 2023 Pending
Array ( [id] => 18745615 [patent_doc_number] => 20230354609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => METHOD OF MAKING A THREE-DIMENSIONAL MEMORY DEVICE USING COMPOSITE HARD MASKS FOR FORMATION OF DEEP VIA OPENINGS [patent_app_type] => utility [patent_app_number] => 18/346504 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 64858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346504
METHOD OF MAKING A THREE-DIMENSIONAL MEMORY DEVICE USING COMPOSITE HARD MASKS FOR FORMATION OF DEEP VIA OPENINGS Jul 2, 2023 Pending
Array ( [id] => 20177441 [patent_doc_number] => 12396206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Semiconductor device with shallow contacts and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/216793 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216793
Semiconductor device with shallow contacts and method for fabricating the same Jun 29, 2023 Issued
Array ( [id] => 19101046 [patent_doc_number] => 20240120274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/217012 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18217012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/217012
Semiconductor device Jun 29, 2023 Issued
Array ( [id] => 19688105 [patent_doc_number] => 20250006650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => MACHINE-READABLE CODE IN INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/341893 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341893 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341893
MACHINE-READABLE CODE IN INTEGRATED CIRCUIT Jun 26, 2023 Pending
Array ( [id] => 18882938 [patent_doc_number] => 20240006307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => INTERCONNECT SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/341111 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341111
INTERCONNECT SUBSTRATE Jun 25, 2023 Pending
Array ( [id] => 18743482 [patent_doc_number] => 20230352470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => BACK-TO-BACK SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS [patent_app_type] => utility [patent_app_number] => 18/340602 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340602
Back-to-back solid state lighting devices and associated methods Jun 22, 2023 Issued
Array ( [id] => 19662118 [patent_doc_number] => 20240429183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/213105 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213105
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES Jun 21, 2023 Pending
Array ( [id] => 19844139 [patent_doc_number] => 12256555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Memory device, semiconductor device, and method of fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 18/333498 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 17723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333498 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333498
Memory device, semiconductor device, and method of fabricating semiconductor device Jun 11, 2023 Issued
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