Search

Tu Tu V Ho

Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16021601 [patent_doc_number] => 20200185644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => DISPLAY DEVICE, METHOD FOR MANUFACTURING DISPLAY DEVICE, AND MANUFACTURING APPARATUS OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/623461 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16623461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/623461
Display device, method for manufacturing display device, and manufacturing apparatus of display device Jun 20, 2017 Issued
Array ( [id] => 11967368 [patent_doc_number] => 20170271521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'TRANSISTOR, METHOD FOR MANUFACTURING TRANSISTOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/610683 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 47510 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15610683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/610683
Transistor, method for manufacturing transistor, semiconductor device, and electronic device May 31, 2017 Issued
Array ( [id] => 12250241 [patent_doc_number] => 09923024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-20 [patent_title] => 'CMOS image sensor with reduced cross talk' [patent_app_type] => utility [patent_app_number] => 15/607309 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3821 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607309 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607309
CMOS image sensor with reduced cross talk May 25, 2017 Issued
Array ( [id] => 13160015 [patent_doc_number] => 10096743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-09 [patent_title] => Gigantic quantum dots [patent_app_type] => utility [patent_app_number] => 15/607253 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2965 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607253 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607253
Gigantic quantum dots May 25, 2017 Issued
Array ( [id] => 12693382 [patent_doc_number] => 20180122960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => OPTICAL COMPONENT PACKAGING STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/607393 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607393
Optical component packaging structure May 25, 2017 Issued
Array ( [id] => 13187989 [patent_doc_number] => 10109521 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-23 [patent_title] => Method to prevent cobalt recess [patent_app_type] => utility [patent_app_number] => 15/606895 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1967 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606895 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606895
Method to prevent cobalt recess May 25, 2017 Issued
Array ( [id] => 13214677 [patent_doc_number] => 10121714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => Semiconductor device and casing of the semiconductor device [patent_app_type] => utility [patent_app_number] => 15/606816 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8145 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606816 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606816
Semiconductor device and casing of the semiconductor device May 25, 2017 Issued
Array ( [id] => 12223730 [patent_doc_number] => 20180062090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'Flexible Display' [patent_app_type] => utility [patent_app_number] => 15/597128 [patent_app_country] => US [patent_app_date] => 2017-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 20087 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15597128 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/597128
Flexible display May 15, 2017 Issued
Array ( [id] => 12897271 [patent_doc_number] => 20180190932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => Organic Light Emitting Device [patent_app_type] => utility [patent_app_number] => 15/593029 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593029 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593029
Organic light emitting device May 10, 2017 Issued
Array ( [id] => 12631131 [patent_doc_number] => 20180102207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => PATTERNING MAGNETIC FILMS USING SELF-STOP ELECTRO-ETCHING [patent_app_type] => utility [patent_app_number] => 15/587685 [patent_app_country] => US [patent_app_date] => 2017-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587685 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/587685
Patterning magnetic films using self-stop electro-etching May 4, 2017 Issued
Array ( [id] => 11869469 [patent_doc_number] => 20170236754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'Integrated Clip and Lead and Method of Making a Circuit' [patent_app_type] => utility [patent_app_number] => 15/585519 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3060 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585519
Integrated clip and lead and method of making a circuit May 2, 2017 Issued
Array ( [id] => 12062006 [patent_doc_number] => 20170338349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/585849 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 31683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585849 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585849
SEMICONDUCTOR DEVICE AND MEMORY DEVICE May 2, 2017 Abandoned
Array ( [id] => 13543195 [patent_doc_number] => 20180323144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => MULTI-DIE INDUCTORS WITH COUPLED THROUGH-SUBSTRATE VIA CORES [patent_app_type] => utility [patent_app_number] => 15/584881 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584881 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584881
Multi-die inductors with coupled through-substrate via cores May 1, 2017 Issued
Array ( [id] => 12554724 [patent_doc_number] => 10014468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Barrier layer for correlated electron material [patent_app_type] => utility [patent_app_number] => 15/499212 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12199 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499212 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499212
Barrier layer for correlated electron material Apr 26, 2017 Issued
Array ( [id] => 14177947 [patent_doc_number] => 10262994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => FinFET LDMOS devices with additional dynamic control [patent_app_type] => utility [patent_app_number] => 15/495236 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 5064 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495236 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495236
FinFET LDMOS devices with additional dynamic control Apr 23, 2017 Issued
Array ( [id] => 12256979 [patent_doc_number] => 09929128 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Chip package structure with adhesive layer' [patent_app_type] => utility [patent_app_number] => 15/492617 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492617 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492617
Chip package structure with adhesive layer Apr 19, 2017 Issued
Array ( [id] => 13071209 [patent_doc_number] => 10056390 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => FinFET SRAM having discontinuous PMOS fin lines [patent_app_type] => utility [patent_app_number] => 15/492777 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492777 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492777
FinFET SRAM having discontinuous PMOS fin lines Apr 19, 2017 Issued
Array ( [id] => 12457200 [patent_doc_number] => 09984937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-29 [patent_title] => Vertical silicon/silicon-germanium transistors with multiple threshold voltages [patent_app_type] => utility [patent_app_number] => 15/492615 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5970 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492615 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492615
Vertical silicon/silicon-germanium transistors with multiple threshold voltages Apr 19, 2017 Issued
Array ( [id] => 13071157 [patent_doc_number] => 10056364 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => Electronic device with adjustable reverse breakdown voltage [patent_app_type] => utility [patent_app_number] => 15/481882 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5640 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481882 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481882
Electronic device with adjustable reverse breakdown voltage Apr 6, 2017 Issued
Array ( [id] => 12436545 [patent_doc_number] => 09978699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-22 [patent_title] => Three-dimensional complementary-conducting-strip structure [patent_app_type] => utility [patent_app_number] => 15/481872 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 52 [patent_no_of_words] => 5756 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481872 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481872
Three-dimensional complementary-conducting-strip structure Apr 6, 2017 Issued
Menu