
Tu Tu V Ho
Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2804 |
| Issued Applications | 2592 |
| Pending Applications | 124 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18696612
[patent_doc_number] => 20230327053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-12
[patent_title] => DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/332769
[patent_app_country] => US
[patent_app_date] => 2023-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16896
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332769
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/332769 | Display apparatus and manufacturing method thereof | Jun 11, 2023 | Issued |
Array
(
[id] => 18729580
[patent_doc_number] => 20230343876
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => Nanowire Stack GAA Device with Inner Spacer and Methods for Producing the Same
[patent_app_type] => utility
[patent_app_number] => 18/332938
[patent_app_country] => US
[patent_app_date] => 2023-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332938
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/332938 | Nanowire stack GAA device with inner spacer and methods for producing the same | Jun 11, 2023 | Issued |
Array
(
[id] => 19636579
[patent_doc_number] => 20240415028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => TUNABLE GROUND CONNECTION TO MAJORANA ZERO MODES
[patent_app_type] => utility
[patent_app_number] => 18/332653
[patent_app_country] => US
[patent_app_date] => 2023-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9550
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332653
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/332653 | TUNABLE GROUND CONNECTION TO MAJORANA ZERO MODES | Jun 8, 2023 | Pending |
Array
(
[id] => 19639634
[patent_doc_number] => 12170249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-17
[patent_title] => Semiconductor package including interposer
[patent_app_type] => utility
[patent_app_number] => 18/332494
[patent_app_country] => US
[patent_app_date] => 2023-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 11316
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332494
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/332494 | Semiconductor package including interposer | Jun 8, 2023 | Issued |
Array
(
[id] => 19703970
[patent_doc_number] => 12198008
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Frequency allocation in multi-qubit circuits
[patent_app_type] => utility
[patent_app_number] => 18/331465
[patent_app_country] => US
[patent_app_date] => 2023-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11398
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331465
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/331465 | Frequency allocation in multi-qubit circuits | Jun 7, 2023 | Issued |
Array
(
[id] => 19584209
[patent_doc_number] => 12150358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 18/205438
[patent_app_country] => US
[patent_app_date] => 2023-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5886
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205438
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/205438 | Display device | Jun 1, 2023 | Issued |
Array
(
[id] => 19619285
[patent_doc_number] => 20240404965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MAKING
[patent_app_type] => utility
[patent_app_number] => 18/205030
[patent_app_country] => US
[patent_app_date] => 2023-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19712
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205030
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/205030 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING | Jun 1, 2023 | Pending |
Array
(
[id] => 18823090
[patent_doc_number] => 20230397431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => FORMATION FOR MEMORY CELLS
[patent_app_type] => utility
[patent_app_number] => 18/204773
[patent_app_country] => US
[patent_app_date] => 2023-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13119
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204773
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/204773 | FORMATION FOR MEMORY CELLS | May 31, 2023 | Issued |
Array
(
[id] => 19619262
[patent_doc_number] => 20240404942
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => HIGH DENSITY BACKSIDE MIM CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 18/326055
[patent_app_country] => US
[patent_app_date] => 2023-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4781
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326055
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/326055 | HIGH DENSITY BACKSIDE MIM CAPACITOR | May 30, 2023 | Pending |
Array
(
[id] => 19604814
[patent_doc_number] => 20240395694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-28
[patent_title] => METAL-INSULATOR-SILICIDE CAPACITORS
[patent_app_type] => utility
[patent_app_number] => 18/324400
[patent_app_country] => US
[patent_app_date] => 2023-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6027
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324400
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/324400 | METAL-INSULATOR-SILICIDE CAPACITORS | May 25, 2023 | Pending |
Array
(
[id] => 18631819
[patent_doc_number] => 20230290724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => SEMICONDUCTOR CIRCUIT FOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/320390
[patent_app_country] => US
[patent_app_date] => 2023-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8901
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320390
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/320390 | SEMICONDUCTOR CIRCUIT FOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | May 18, 2023 | Pending |
Array
(
[id] => 18631864
[patent_doc_number] => 20230290769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING CUMULATIVE SEALING STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/319137
[patent_app_country] => US
[patent_app_date] => 2023-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18070
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319137
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/319137 | Semiconductor device including cumulative sealing structures | May 16, 2023 | Issued |
Array
(
[id] => 18849166
[patent_doc_number] => 20230411570
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => Electronic device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 18/317567
[patent_app_country] => US
[patent_app_date] => 2023-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5536
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317567
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/317567 | Electronic device and method for manufacturing the same | May 14, 2023 | Pending |
Array
(
[id] => 20205647
[patent_doc_number] => 12408444
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-02
[patent_title] => Semiconductor device structure with fuse and resistor and method for preparing the same
[patent_app_type] => utility
[patent_app_number] => 18/143706
[patent_app_country] => US
[patent_app_date] => 2023-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 5800
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18143706
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/143706 | Semiconductor device structure with fuse and resistor and method for preparing the same | May 4, 2023 | Issued |
Array
(
[id] => 18601823
[patent_doc_number] => 20230276628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/312782
[patent_app_country] => US
[patent_app_date] => 2023-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9110
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312782
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312782 | Nonvolatile memory device and method for fabricating the same | May 4, 2023 | Issued |
Array
(
[id] => 18600279
[patent_doc_number] => 20230275080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => INTEGRATED CIRCUIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/312219
[patent_app_country] => US
[patent_app_date] => 2023-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15240
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312219
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312219 | Integrated circuit device | May 3, 2023 | Issued |
Array
(
[id] => 18586063
[patent_doc_number] => 20230268328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-24
[patent_title] => METHOD FOR FABRICATING ELECTRONIC PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/309756
[patent_app_country] => US
[patent_app_date] => 2023-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309756
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/309756 | Method for fabricating electronic package | Apr 27, 2023 | Issued |
Array
(
[id] => 18570562
[patent_doc_number] => 20230260899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/308643
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13897
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308643
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/308643 | Semiconductor package and manufacturing method thereof | Apr 26, 2023 | Issued |
Array
(
[id] => 19054724
[patent_doc_number] => 20240096693
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => SELECTIVE ILD DEPOSITION FOR FULLY ALIGNED VIA WITH AIRGAP
[patent_app_type] => utility
[patent_app_number] => 18/139199
[patent_app_country] => US
[patent_app_date] => 2023-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8438
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139199
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/139199 | Selective ILD deposition for fully aligned via with airgap | Apr 24, 2023 | Issued |
Array
(
[id] => 19260960
[patent_doc_number] => 12021026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Package structure and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/306227
[patent_app_country] => US
[patent_app_date] => 2023-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 21
[patent_no_of_words] => 9014
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306227
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/306227 | Package structure and method of fabricating the same | Apr 23, 2023 | Issued |