
Tu Tu V Ho
Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2804 |
| Issued Applications | 2592 |
| Pending Applications | 124 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12181572
[patent_doc_number] => 20180040508
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-08
[patent_title] => 'TFT STRUCTURE AND REPAIR METHOD THEREOF, GOA CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/025893
[patent_app_country] => US
[patent_app_date] => 2016-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3094
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15025893
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/025893 | TFT STRUCTURE AND REPAIR METHOD THEREOF, GOA CIRCUIT | Feb 24, 2016 | Abandoned |
Array
(
[id] => 11321821
[patent_doc_number] => 09520572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-13
[patent_title] => 'Electronic device and method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 15/051655
[patent_app_country] => US
[patent_app_date] => 2016-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 32
[patent_no_of_words] => 16350
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15051655
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/051655 | Electronic device and method of manufacturing semiconductor device | Feb 22, 2016 | Issued |
Array
(
[id] => 11398115
[patent_doc_number] => 20170018652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-19
[patent_title] => 'P-SI TFT AND METHOD FOR FABRICATING THE SAME, ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME, AND DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/122066
[patent_app_country] => US
[patent_app_date] => 2016-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4807
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15122066
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/122066 | P-Si TFT and method for fabricating the same, array substrate and method for fabricating the same, and display device | Feb 21, 2016 | Issued |
Array
(
[id] => 10826274
[patent_doc_number] => 20160172442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-16
[patent_title] => 'CIRCUITS USING GATE-ALL-AROUND TECHNOLOGY'
[patent_app_type] => utility
[patent_app_number] => 15/048677
[patent_app_country] => US
[patent_app_date] => 2016-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 13405
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15048677
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/048677 | Circuits using gate-all-around technology | Feb 18, 2016 | Issued |
Array
(
[id] => 13766785
[patent_doc_number] => 10175733
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-08
[patent_title] => Systems and methods for substrates
[patent_app_type] => utility
[patent_app_number] => 15/045598
[patent_app_country] => US
[patent_app_date] => 2016-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 6879
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15045598
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/045598 | Systems and methods for substrates | Feb 16, 2016 | Issued |
Array
(
[id] => 10826443
[patent_doc_number] => 20160172611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-16
[patent_title] => 'PHOTODETECTORS AND PHOTOVOLTAICS BASED ON SEMICONDUCTOR NANOCRYSTALS'
[patent_app_type] => utility
[patent_app_number] => 15/018321
[patent_app_country] => US
[patent_app_date] => 2016-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 14173
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018321
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/018321 | Photodetectors and photovoltaics based on semiconductor nanocrystals | Feb 7, 2016 | Issued |
Array
(
[id] => 11028817
[patent_doc_number] => 20160225772
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/007259
[patent_app_country] => US
[patent_app_date] => 2016-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 54
[patent_figures_cnt] => 54
[patent_no_of_words] => 31625
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15007259
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/007259 | Semiconductor device and memory device | Jan 26, 2016 | Issued |
Array
(
[id] => 11110968
[patent_doc_number] => 20160307938
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'THIN-FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/006643
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8929
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006643
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006643 | Thin-film transistor, array substrate and display apparatus | Jan 25, 2016 | Issued |
Array
(
[id] => 11057412
[patent_doc_number] => 20160254374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-01
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/006164
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8650
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006164
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006164 | Semiconductor device and method for manufacturing the same | Jan 25, 2016 | Issued |
Array
(
[id] => 11565016
[patent_doc_number] => 09627615
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-18
[patent_title] => 'Fabrication of correlated electron material devices'
[patent_app_type] => utility
[patent_app_number] => 15/006889
[patent_app_country] => US
[patent_app_date] => 2016-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 10807
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15006889
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/006889 | Fabrication of correlated electron material devices | Jan 25, 2016 | Issued |
Array
(
[id] => 11286694
[patent_doc_number] => 09502554
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'High frequency switching MOSFETs with low output capacitance using a depletable P-shield'
[patent_app_type] => utility
[patent_app_number] => 15/004805
[patent_app_country] => US
[patent_app_date] => 2016-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 29
[patent_no_of_words] => 7848
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15004805
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/004805 | High frequency switching MOSFETs with low output capacitance using a depletable P-shield | Jan 21, 2016 | Issued |
Array
(
[id] => 10772301
[patent_doc_number] => 20160118458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-04-28
[patent_title] => 'METAL-INSULATOR-METAL BACK END OF LINE CAPACITOR STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 14/983157
[patent_app_country] => US
[patent_app_date] => 2015-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3237
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983157
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/983157 | Metal-insulator-metal back end of line capacitor structures | Dec 28, 2015 | Issued |
Array
(
[id] => 11227667
[patent_doc_number] => 09455393
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-09-27
[patent_title] => 'Low temperature deposition of low loss dielectric layers in superconducting circuits'
[patent_app_type] => utility
[patent_app_number] => 14/981163
[patent_app_country] => US
[patent_app_date] => 2015-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 4798
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14981163
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/981163 | Low temperature deposition of low loss dielectric layers in superconducting circuits | Dec 27, 2015 | Issued |
Array
(
[id] => 12095513
[patent_doc_number] => 20170352606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-07
[patent_title] => 'BORON NITRIDE NANOTUBE ENHANCED ELECTRICAL COMPONENTS'
[patent_app_type] => utility
[patent_app_number] => 15/540539
[patent_app_country] => US
[patent_app_date] => 2015-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7617
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15540539
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/540539 | Boron nitride nanotube enhanced electrical components | Dec 16, 2015 | Issued |
Array
(
[id] => 11510248
[patent_doc_number] => 09601414
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-21
[patent_title] => 'Method for preventing die pad delamination'
[patent_app_type] => utility
[patent_app_number] => 14/968234
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4003
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968234
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968234 | Method for preventing die pad delamination | Dec 13, 2015 | Issued |
Array
(
[id] => 10747558
[patent_doc_number] => 20160093709
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-31
[patent_title] => 'Transistor-Containing Constructions and Memory Arrays'
[patent_app_type] => utility
[patent_app_number] => 14/964923
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3315
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14964923
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/964923 | Transistor-Containing Constructions and Memory Arrays | Dec 9, 2015 | Abandoned |
Array
(
[id] => 11227545
[patent_doc_number] => 09455271
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-09-27
[patent_title] => 'Semiconductor memory device and method of manufacturing semiconductor memory device and method of layouting auxiliary pattern'
[patent_app_type] => utility
[patent_app_number] => 14/965159
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 23
[patent_no_of_words] => 7746
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965159
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/965159 | Semiconductor memory device and method of manufacturing semiconductor memory device and method of layouting auxiliary pattern | Dec 9, 2015 | Issued |
Array
(
[id] => 11014225
[patent_doc_number] => 20160211178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-21
[patent_title] => 'METHOD OF DICING A WAFER AND SEMICONDUCTOR CHIP'
[patent_app_type] => utility
[patent_app_number] => 14/964603
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6841
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14964603
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/964603 | Method of dicing a wafer and semiconductor chip | Dec 9, 2015 | Issued |
Array
(
[id] => 11232282
[patent_doc_number] => 09459508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-10-04
[patent_title] => 'Display device'
[patent_app_type] => utility
[patent_app_number] => 14/965151
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 10117
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965151
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/965151 | Display device | Dec 9, 2015 | Issued |
Array
(
[id] => 11286467
[patent_doc_number] => 09502326
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/964920
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 8412
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14964920
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/964920 | Semiconductor device | Dec 9, 2015 | Issued |