Search

Tu Tu V Ho

Examiner (ID: 15910, Phone: (571)272-1778 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2804
Issued Applications
2592
Pending Applications
124
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11950903 [patent_doc_number] => 20170255053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'COLOR FILTER ARRAY SUBSTRATE AND MANUFATURING METHOD THEREOF, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/787064 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4881 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14787064 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/787064
Color filter array substrate and manufacturing method thereof, and display device Sep 29, 2015 Issued
Array ( [id] => 14769307 [patent_doc_number] => 10396055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Method, apparatus and system to interconnect packaged integrated circuit dies [patent_app_type] => utility [patent_app_number] => 15/749760 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8903 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15749760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/749760
Method, apparatus and system to interconnect packaged integrated circuit dies Sep 24, 2015 Issued
Array ( [id] => 13112075 [patent_doc_number] => 10074696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Imaging device, manufacturing device, and manufacturing method [patent_app_type] => utility [patent_app_number] => 15/512550 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 11098 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15512550 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/512550
Imaging device, manufacturing device, and manufacturing method Sep 24, 2015 Issued
Array ( [id] => 10659826 [patent_doc_number] => 20160005969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/857217 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 90 [patent_figures_cnt] => 90 [patent_no_of_words] => 23098 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857217 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857217
Semiconductor storage device and method for manufacturing same Sep 16, 2015 Issued
Array ( [id] => 11286688 [patent_doc_number] => 09502548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-22 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/851218 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2762 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14851218 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/851218
Semiconductor device Sep 10, 2015 Issued
Array ( [id] => 11307758 [patent_doc_number] => 09515165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-06 [patent_title] => 'III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture' [patent_app_type] => utility [patent_app_number] => 14/850954 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850954 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850954
III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture Sep 10, 2015 Issued
Array ( [id] => 11770342 [patent_doc_number] => 09379035 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-28 [patent_title] => 'IC package having non-horizontal die pad and lead frame therefor' [patent_app_type] => utility [patent_app_number] => 14/850966 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3207 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850966 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850966
IC package having non-horizontal die pad and lead frame therefor Sep 10, 2015 Issued
Array ( [id] => 10745295 [patent_doc_number] => 20160091446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-31 [patent_title] => 'SENSOR CHIP' [patent_app_type] => utility [patent_app_number] => 14/850031 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5113 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850031 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850031
Sensor chip Sep 9, 2015 Issued
Array ( [id] => 11524489 [patent_doc_number] => 09607900 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Method and structure to fabricate closely packed hybrid nanowires at scaled pitch' [patent_app_type] => utility [patent_app_number] => 14/850154 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 39 [patent_no_of_words] => 7057 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850154 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850154
Method and structure to fabricate closely packed hybrid nanowires at scaled pitch Sep 9, 2015 Issued
Array ( [id] => 10624608 [patent_doc_number] => 09343558 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-17 [patent_title] => 'Silicon controlled rectifier' [patent_app_type] => utility [patent_app_number] => 14/850951 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850951 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850951
Silicon controlled rectifier Sep 9, 2015 Issued
Array ( [id] => 11770436 [patent_doc_number] => 09379133 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-28 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/850284 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 10860 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850284 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850284
Semiconductor device and method of manufacturing the same Sep 9, 2015 Issued
Array ( [id] => 11781825 [patent_doc_number] => 09391024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Multi-layer dielectric stack for plasma damage protection' [patent_app_type] => utility [patent_app_number] => 14/850069 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850069 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850069
Multi-layer dielectric stack for plasma damage protection Sep 9, 2015 Issued
Array ( [id] => 11911204 [patent_doc_number] => 09780025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Interconnection structure and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/850848 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850848 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850848
Interconnection structure and manufacturing method thereof Sep 9, 2015 Issued
Array ( [id] => 10487190 [patent_doc_number] => 20150372210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'LEAD FRAME FOR MOUNTING LED ELEMENTS, LEAD FRAME WITH RESIN, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, AND LEAD FRAME FOR MOUNTING SEMICONDUCTOR ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/842221 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 19873 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842221 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/842221
Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements Aug 31, 2015 Issued
Array ( [id] => 10464213 [patent_doc_number] => 20150349227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'LEAD FRAME FOR MOUNTING LED ELEMENTS, LEAD FRAME WITH RESIN, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES, AND LEAD FRAME FOR MOUNTING SEMICONDUCTOR ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/823610 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 19864 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823610 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823610
Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements Aug 10, 2015 Issued
Array ( [id] => 11446283 [patent_doc_number] => 20170047304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'APPARATUS AND METHODS FOR CREATING ENVIRONMENTALLY PROTECTIVE COATING FOR INTEGRATED CIRCUIT ASSEMBLIES' [patent_app_type] => utility [patent_app_number] => 14/823021 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2963 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/823021
Apparatus and methods for creating environmentally protective coating for integrated circuit assemblies Aug 10, 2015 Issued
Array ( [id] => 11869690 [patent_doc_number] => 20170236975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'III-Nitride Nanowire LED with Strain Modified Surface Active Region and Method of Making Thereof' [patent_app_type] => utility [patent_app_number] => 15/502758 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15502758 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/502758
III-nitride nanowire LED with strain modified surface active region and method of making thereof Aug 6, 2015 Issued
Array ( [id] => 10448238 [patent_doc_number] => 20150333252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'PERPENDICULAR SPIN TRANSFER TORQUE MEMORY (STTM) DEVICE HAVING OFFSET CELLS AND METHOD TO FORM SAME' [patent_app_type] => utility [patent_app_number] => 14/812655 [patent_app_country] => US [patent_app_date] => 2015-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8899 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14812655 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/812655
Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form same Jul 28, 2015 Issued
Array ( [id] => 13695515 [patent_doc_number] => 20170358712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => DEEP ULTRAVIOLET LED AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/540510 [patent_app_country] => US [patent_app_date] => 2015-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15540510 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/540510
Deep ultraviolet LED and method for manufacturing the same Jul 28, 2015 Issued
Array ( [id] => 11417562 [patent_doc_number] => 09564395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Bonding pad arrangment design for multi-die semiconductor package structure' [patent_app_type] => utility [patent_app_number] => 14/809482 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6010 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14809482 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/809482
Bonding pad arrangment design for multi-die semiconductor package structure Jul 26, 2015 Issued
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