
Tu Tu V. Ho
Examiner (ID: 15910)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2804 |
| Issued Applications | 2592 |
| Pending Applications | 124 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4974659
[patent_doc_number] => 20070215889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Aromatic amine compound, and light-emitting element, light-emitting device, and electronic appliance using the aromatic amine compound'
[patent_app_type] => utility
[patent_app_number] => 11/717680
[patent_app_country] => US
[patent_app_date] => 2007-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 73
[patent_figures_cnt] => 73
[patent_no_of_words] => 32882
[patent_no_of_claims] => 100
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0215/20070215889.pdf
[firstpage_image] =>[orig_patent_app_number] => 11717680
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/717680 | Aromatic amine compound, and light-emitting element, light-emitting device, and electronic appliance using the aromatic amine compound | Mar 13, 2007 | Abandoned |
Array
(
[id] => 330850
[patent_doc_number] => 07511348
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-31
[patent_title] => 'MOS transistors with selectively strained channels'
[patent_app_type] => utility
[patent_app_number] => 11/717450
[patent_app_country] => US
[patent_app_date] => 2007-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2198
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/511/07511348.pdf
[firstpage_image] =>[orig_patent_app_number] => 11717450
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/717450 | MOS transistors with selectively strained channels | Mar 12, 2007 | Issued |
Array
(
[id] => 315150
[patent_doc_number] => 07525120
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Thin film transistor array substrate and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/716690
[patent_app_country] => US
[patent_app_date] => 2007-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 6917
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/525/07525120.pdf
[firstpage_image] =>[orig_patent_app_number] => 11716690
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/716690 | Thin film transistor array substrate and method of fabricating the same | Mar 11, 2007 | Issued |
Array
(
[id] => 5217385
[patent_doc_number] => 20070158696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Optical enhancement of integrated circuit photodetectors'
[patent_app_type] => utility
[patent_app_number] => 11/716863
[patent_app_country] => US
[patent_app_date] => 2007-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6160
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20070158696.pdf
[firstpage_image] =>[orig_patent_app_number] => 11716863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/716863 | Optical enhancement of integrated circuit photodetectors | Mar 11, 2007 | Issued |
Array
(
[id] => 4930475
[patent_doc_number] => 20080001250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Semiconductor device and fabrication method therefor'
[patent_app_type] => utility
[patent_app_number] => 11/714900
[patent_app_country] => US
[patent_app_date] => 2007-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6408
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20080001250.pdf
[firstpage_image] =>[orig_patent_app_number] => 11714900
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/714900 | Semiconductor device and fabrication method therefor | Mar 6, 2007 | Abandoned |
Array
(
[id] => 5022855
[patent_doc_number] => 20070148821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'THERMALLY ENHANCED STACKED DIE PACKAGE AND FABRICATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/683329
[patent_app_country] => US
[patent_app_date] => 2007-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4141
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20070148821.pdf
[firstpage_image] =>[orig_patent_app_number] => 11683329
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/683329 | THERMALLY ENHANCED STACKED DIE PACKAGE AND FABRICATION METHOD | Mar 6, 2007 | Abandoned |
Array
(
[id] => 4695450
[patent_doc_number] => 20080217634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-11
[patent_title] => 'VERTICAL LIGHT-EMITTING DIODE STRUCTURE WITH OMNI-DIRECTIONAL REFLECTOR'
[patent_app_type] => utility
[patent_app_number] => 11/682780
[patent_app_country] => US
[patent_app_date] => 2007-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2484
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20080217634.pdf
[firstpage_image] =>[orig_patent_app_number] => 11682780
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/682780 | VERTICAL LIGHT-EMITTING DIODE STRUCTURE WITH OMNI-DIRECTIONAL REFLECTOR | Mar 5, 2007 | Abandoned |
Array
(
[id] => 5256727
[patent_doc_number] => 20070210359
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Image Sensor and Method of Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 11/682550
[patent_app_country] => US
[patent_app_date] => 2007-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2729
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20070210359.pdf
[firstpage_image] =>[orig_patent_app_number] => 11682550
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/682550 | Image sensor and method of manufacturing the same | Mar 5, 2007 | Issued |
Array
(
[id] => 349174
[patent_doc_number] => 07495292
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Integrated circuit devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate'
[patent_app_type] => utility
[patent_app_number] => 11/713160
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 4584
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/495/07495292.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713160
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713160 | Integrated circuit devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate | Mar 1, 2007 | Issued |
Array
(
[id] => 232698
[patent_doc_number] => 07598123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-06
[patent_title] => 'Semiconductor component and method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/681500
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 28
[patent_no_of_words] => 6331
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/598/07598123.pdf
[firstpage_image] =>[orig_patent_app_number] => 11681500
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/681500 | Semiconductor component and method of manufacture | Mar 1, 2007 | Issued |
Array
(
[id] => 4698158
[patent_doc_number] => 20080220342
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-11
[patent_title] => 'METHODS OF FABRICATING OPTICAL PACKAGES, SYSTEMS COMPRISING THE SAME, AND THEIR USES'
[patent_app_type] => utility
[patent_app_number] => 11/713010
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4685
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 23
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0220/20080220342.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713010
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713010 | Methods of fabricating optical packages, systems comprising the same, and their uses | Mar 1, 2007 | Issued |
Array
(
[id] => 7601433
[patent_doc_number] => 07385272
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-10
[patent_title] => 'Method and apparatus for removing electrons from CMOS sensor photodetectors'
[patent_app_type] => utility
[patent_app_number] => 11/713822
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 36
[patent_no_of_words] => 10245
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 382
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/385/07385272.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713822
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713822 | Method and apparatus for removing electrons from CMOS sensor photodetectors | Mar 1, 2007 | Issued |
Array
(
[id] => 4673432
[patent_doc_number] => 20080211060
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-04
[patent_title] => 'ANTI-FUSE WHICH WILL NOT GENERATE A NON-LINEAR CURRENT AFTER BEING BLOWN AND OTP MEMORY CELL UTILIZING THE ANTI-FUSE'
[patent_app_type] => utility
[patent_app_number] => 11/680630
[patent_app_country] => US
[patent_app_date] => 2007-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4060
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0211/20080211060.pdf
[firstpage_image] =>[orig_patent_app_number] => 11680630
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/680630 | ANTI-FUSE WHICH WILL NOT GENERATE A NON-LINEAR CURRENT AFTER BEING BLOWN AND OTP MEMORY CELL UTILIZING THE ANTI-FUSE | Feb 28, 2007 | Abandoned |
Array
(
[id] => 4701833
[patent_doc_number] => 20080061355
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'Method of reducing memory cell size for floating gate NAND flash'
[patent_app_type] => utility
[patent_app_number] => 11/713780
[patent_app_country] => US
[patent_app_date] => 2007-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 6561
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0061/20080061355.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713780
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713780 | Method of reducing memory cell size for floating gate NAND flash | Feb 28, 2007 | Abandoned |
Array
(
[id] => 4673309
[patent_doc_number] => 20080210937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-04
[patent_title] => 'Hetero-Crystalline Structure and Method of Making Same'
[patent_app_type] => utility
[patent_app_number] => 11/681080
[patent_app_country] => US
[patent_app_date] => 2007-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 9152
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20080210937.pdf
[firstpage_image] =>[orig_patent_app_number] => 11681080
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/681080 | Hetero-crystalline structure and method of making same | Feb 28, 2007 | Issued |
Array
(
[id] => 4698086
[patent_doc_number] => 20080220270
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-11
[patent_title] => 'Fabricating Tall Micro Structures'
[patent_app_type] => utility
[patent_app_number] => 11/680600
[patent_app_country] => US
[patent_app_date] => 2007-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5411
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0220/20080220270.pdf
[firstpage_image] =>[orig_patent_app_number] => 11680600
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/680600 | Fabricating tall micro structures | Feb 27, 2007 | Issued |
Array
(
[id] => 307778
[patent_doc_number] => 07531851
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-05-12
[patent_title] => 'Electronic device with reduced interface charge between epitaxially grown layers and a method for making the same'
[patent_app_type] => utility
[patent_app_number] => 11/713070
[patent_app_country] => US
[patent_app_date] => 2007-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 6489
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/531/07531851.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713070
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713070 | Electronic device with reduced interface charge between epitaxially grown layers and a method for making the same | Feb 27, 2007 | Issued |
Array
(
[id] => 7595217
[patent_doc_number] => 07626244
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-01
[patent_title] => 'Stressed dielectric devices and methods of fabricating same'
[patent_app_type] => utility
[patent_app_number] => 11/679880
[patent_app_country] => US
[patent_app_date] => 2007-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 3606
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/626/07626244.pdf
[firstpage_image] =>[orig_patent_app_number] => 11679880
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/679880 | Stressed dielectric devices and methods of fabricating same | Feb 27, 2007 | Issued |
Array
(
[id] => 5019496
[patent_doc_number] => 20070145462
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Low tunnel barrier insulators'
[patent_app_type] => utility
[patent_app_number] => 11/708438
[patent_app_country] => US
[patent_app_date] => 2007-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10785
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20070145462.pdf
[firstpage_image] =>[orig_patent_app_number] => 11708438
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/708438 | Low tunnel barrier insulators | Feb 19, 2007 | Issued |
Array
(
[id] => 163170
[patent_doc_number] => 07671412
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Method and device for controlling temperature of a substrate using an internal temperature control device'
[patent_app_type] => utility
[patent_app_number] => 11/675210
[patent_app_country] => US
[patent_app_date] => 2007-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 5449
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/671/07671412.pdf
[firstpage_image] =>[orig_patent_app_number] => 11675210
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/675210 | Method and device for controlling temperature of a substrate using an internal temperature control device | Feb 14, 2007 | Issued |