Search

Tuan A. Hoang

Examiner (ID: 7516, Phone: (571)270-0406 , Office: P/2896 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2896, 2898
Total Applications
557
Issued Applications
368
Pending Applications
78
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17353119 [patent_doc_number] => 11227764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Laser irradiation method and laser irradiation apparatus [patent_app_type] => utility [patent_app_number] => 16/592087 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5105 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592087 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592087
Laser irradiation method and laser irradiation apparatus Oct 2, 2019 Issued
Array ( [id] => 16332286 [patent_doc_number] => 20200303252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => METHOD OF FORMING METAL TRACES [patent_app_type] => utility [patent_app_number] => 16/592000 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592000 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592000
METHOD OF FORMING METAL TRACES Oct 2, 2019 Abandoned
Array ( [id] => 15807477 [patent_doc_number] => 20200126881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/592543 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592543 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592543
Semiconductor device package and method of manufacturing the same Oct 2, 2019 Issued
Array ( [id] => 17063291 [patent_doc_number] => 11107904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Inner spacer formation in multi-gate transistors [patent_app_type] => utility [patent_app_number] => 16/592281 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 33 [patent_no_of_words] => 11152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592281 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592281
Inner spacer formation in multi-gate transistors Oct 2, 2019 Issued
Array ( [id] => 17574130 [patent_doc_number] => 11322404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Wafer processing method [patent_app_type] => utility [patent_app_number] => 16/592401 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3569 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592401 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592401
Wafer processing method Oct 2, 2019 Issued
Array ( [id] => 18236231 [patent_doc_number] => 11600799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 16/582193 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6534 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582193
Display device Sep 24, 2019 Issued
Array ( [id] => 15351701 [patent_doc_number] => 20200013742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Interconnect Structures, Packaged Semiconductor Devices, and Methods of Packaging Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/577645 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577645 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577645
Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices Sep 19, 2019 Issued
Array ( [id] => 15300483 [patent_doc_number] => 20190393377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => MICRO LIGHT-EMITTING DIODE (LED) ELEMENTS AND DISPLAY [patent_app_type] => utility [patent_app_number] => 16/563558 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/563558
Micro light-emitting diode (LED) elements and display Sep 5, 2019 Issued
Array ( [id] => 15184967 [patent_doc_number] => 20190363075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => CIRCUIT LAYOUT METHOD [patent_app_type] => utility [patent_app_number] => 16/533985 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533985 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533985
Circuit layout method Aug 6, 2019 Issued
Array ( [id] => 15123649 [patent_doc_number] => 20190348458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => IMAGE SENSOR DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/525372 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525372
Image sensor device and fabricating method thereof Jul 28, 2019 Issued
Array ( [id] => 18048110 [patent_doc_number] => 11522068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => IC product comprising an insulating gate separation structure positioned between end surfaces of adjacent gate structures [patent_app_type] => utility [patent_app_number] => 16/523340 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 6728 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523340 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/523340
IC product comprising an insulating gate separation structure positioned between end surfaces of adjacent gate structures Jul 25, 2019 Issued
Array ( [id] => 15093393 [patent_doc_number] => 20190341508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => Backside-Illuminated Photodetector Structure and Method of Making the Same [patent_app_type] => utility [patent_app_number] => 16/517022 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517022
Backside-illuminated photodetector structure and method of making the same Jul 18, 2019 Issued
Array ( [id] => 14969251 [patent_doc_number] => 20190312104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => Bulk Nanosheet with Dielectric Isolation [patent_app_type] => utility [patent_app_number] => 16/452251 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452251 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452251
Bulk nanosheet with dielectric isolation Jun 24, 2019 Issued
Array ( [id] => 14784785 [patent_doc_number] => 20190267290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => METHOD OF FORMING A FIN UNDER A GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/406208 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406208 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406208
Method of forming a fin under a gate structure May 7, 2019 Issued
Array ( [id] => 15427973 [patent_doc_number] => 10546926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => III-V semiconductor devices with selective oxidation [patent_app_type] => utility [patent_app_number] => 16/402267 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 3271 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/402267
III-V semiconductor devices with selective oxidation May 2, 2019 Issued
Array ( [id] => 14753021 [patent_doc_number] => 20190259684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Robust Through-Silicon-Via Structure [patent_app_type] => utility [patent_app_number] => 16/402603 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/402603
Robust through-silicon-via structure May 2, 2019 Issued
Array ( [id] => 16700000 [patent_doc_number] => 10950608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/398109 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 40 [patent_no_of_words] => 9951 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398109
Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same Apr 28, 2019 Issued
Array ( [id] => 14722647 [patent_doc_number] => 20190252387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => SEMICONDUCTOR DEVICE HAVING JUNCTIONLESS VERTICAL GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/398118 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398118 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398118
Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same Apr 28, 2019 Issued
Array ( [id] => 16479560 [patent_doc_number] => 10854514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Microelectronic devices including two contacts [patent_app_type] => utility [patent_app_number] => 16/391600 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5535 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391600
Microelectronic devices including two contacts Apr 22, 2019 Issued
Array ( [id] => 16995531 [patent_doc_number] => 20210233951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/053858 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17053858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/053858
SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE Apr 18, 2019 Abandoned
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