Search

Tuan A. Hoang

Examiner (ID: 7516, Phone: (571)270-0406 , Office: P/2896 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2896, 2898
Total Applications
557
Issued Applications
368
Pending Applications
78
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13435355 [patent_doc_number] => 20180269220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => FINFET VERTICAL FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 15/988828 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/988828
FinFET vertical flash memory May 23, 2018 Issued
Array ( [id] => 15123765 [patent_doc_number] => 20190348516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => WORK FUNCTION MATERIAL RECESS FOR THRESHOLD VOLTAGE TUNING IN FINFETS [patent_app_type] => utility [patent_app_number] => 15/973906 [patent_app_country] => US [patent_app_date] => 2018-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973906 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973906
WORK FUNCTION MATERIAL RECESS FOR THRESHOLD VOLTAGE TUNING IN FINFETS May 7, 2018 Abandoned
Array ( [id] => 15745639 [patent_doc_number] => 20200111709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/500942 [patent_app_country] => US [patent_app_date] => 2018-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16500942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/500942
Method for manufacturing semiconductor devices Apr 9, 2018 Issued
Array ( [id] => 18175364 [patent_doc_number] => 11575083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Insertion layer between spin hall effect or spin orbit torque electrode and free magnet for improved magnetic memory [patent_app_type] => utility [patent_app_number] => 15/943461 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 40 [patent_no_of_words] => 17082 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943461 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943461
Insertion layer between spin hall effect or spin orbit torque electrode and free magnet for improved magnetic memory Apr 1, 2018 Issued
Array ( [id] => 13328147 [patent_doc_number] => 20180215611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MULTI-LAYER GLASS STRUCTURES [patent_app_type] => utility [patent_app_number] => 15/937398 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937398 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937398
MULTI-LAYER GLASS STRUCTURES Mar 26, 2018 Abandoned
Array ( [id] => 17063245 [patent_doc_number] => 11107857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Light emitting diodes, components and related methods [patent_app_type] => utility [patent_app_number] => 15/912155 [patent_app_country] => US [patent_app_date] => 2018-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 18926 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15912155 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/912155
Light emitting diodes, components and related methods Mar 4, 2018 Issued
Array ( [id] => 16560552 [patent_doc_number] => 20210005701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/976736 [patent_app_country] => US [patent_app_date] => 2018-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976736
DISPLAY DEVICE Mar 1, 2018 Abandoned
Array ( [id] => 14617231 [patent_doc_number] => 10361323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Backside-illuminated photodetector structure and method of making the same [patent_app_type] => utility [patent_app_number] => 15/876666 [patent_app_country] => US [patent_app_date] => 2018-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15876666 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/876666
Backside-illuminated photodetector structure and method of making the same Jan 21, 2018 Issued
Array ( [id] => 17574175 [patent_doc_number] => 11322449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Package with fan-out structures [patent_app_type] => utility [patent_app_number] => 15/874374 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 9258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874374 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874374
Package with fan-out structures Jan 17, 2018 Issued
Array ( [id] => 12759274 [patent_doc_number] => 20180144926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => ADVANCED INTERCONNECT WITH AIR GAP [patent_app_type] => utility [patent_app_number] => 15/874654 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874654
Advanced interconnect with air gap Jan 17, 2018 Issued
Array ( [id] => 12759532 [patent_doc_number] => 20180145012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => Robust Through-Silicon-Via Structure [patent_app_type] => utility [patent_app_number] => 15/859872 [patent_app_country] => US [patent_app_date] => 2018-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859872 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859872
Robust through-silicon-via structure Jan 1, 2018 Issued
Array ( [id] => 16264525 [patent_doc_number] => 10755969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Multi-patterning techniques for fabricating an array of metal lines with different widths [patent_app_type] => utility [patent_app_number] => 15/859675 [patent_app_country] => US [patent_app_date] => 2018-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 7874 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859675
Multi-patterning techniques for fabricating an array of metal lines with different widths Dec 31, 2017 Issued
Array ( [id] => 14381803 [patent_doc_number] => 20190164814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => PLUGS FOR INTERCONNECT LINES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 15/859418 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859418 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859418
Plugs for interconnect lines for advanced integrated circuit structure fabrication Dec 29, 2017 Issued
Array ( [id] => 14542777 [patent_doc_number] => 20190207010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => SILICIDE BLOCK INTEGRATION FOR CMOS TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 15/859492 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859492
SILICIDE BLOCK INTEGRATION FOR CMOS TECHNOLOGY Dec 29, 2017 Abandoned
Array ( [id] => 17284121 [patent_doc_number] => 11201163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => High-density NOR-type flash memory [patent_app_type] => utility [patent_app_number] => 15/859499 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3376 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859499 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859499
High-density NOR-type flash memory Dec 29, 2017 Issued
Array ( [id] => 14542939 [patent_doc_number] => 20190207091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => HIGH RETENTION STORAGE LAYER USING ULTRA-LOW RA MgO PROCESS IN PERPENDICULAR MAGNETIC TUNNEL JUNCTIONS FOR MRAM DEVICES [patent_app_type] => utility [patent_app_number] => 15/859458 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859458 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859458
High retention storage layer using ultra-low RA MgO process in perpendicular magnetic tunnel junctions for MRAM devices Dec 29, 2017 Issued
Array ( [id] => 14542521 [patent_doc_number] => 20190206882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MEMORIES WITH SOURCE DIFFUSIONS ELECTRICALLY COUPLED TO SOURCE-CONTACTED LAYERS [patent_app_type] => utility [patent_app_number] => 15/859426 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859426
MEMORIES WITH SOURCE DIFFUSIONS ELECTRICALLY COUPLED TO SOURCE-CONTACTED LAYERS Dec 29, 2017 Abandoned
Array ( [id] => 14542263 [patent_doc_number] => 20190206753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => BICONTINUOUS POROUS CERAMIC COMPOSITE FOR SEMICONDUCTOR PACKAGE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/859483 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859483
BICONTINUOUS POROUS CERAMIC COMPOSITE FOR SEMICONDUCTOR PACKAGE APPLICATIONS Dec 29, 2017 Abandoned
Array ( [id] => 14542401 [patent_doc_number] => 20190206822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDEWALL PROTECTION [patent_app_type] => utility [patent_app_number] => 15/859481 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859481
MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDEWALL PROTECTION Dec 29, 2017 Abandoned
Array ( [id] => 16638067 [patent_doc_number] => 10916582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Vertically-strained silicon device for use with a perpendicular magnetic tunnel junction (PMTJ) [patent_app_type] => utility [patent_app_number] => 15/859453 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 11207 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859453 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859453
Vertically-strained silicon device for use with a perpendicular magnetic tunnel junction (PMTJ) Dec 29, 2017 Issued
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