
Tuan H. Nguyen
Examiner (ID: 11261)
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813, 1104, 3992, 3991 |
| Total Applications | 1968 |
| Issued Applications | 1723 |
| Pending Applications | 53 |
| Abandoned Applications | 192 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 90/009029 | REVENUE METER WITH FIBER CONNECTION | Feb 7, 2008 | Issued |
Array
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[id] => 868150
[patent_doc_number] => 07364973
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[patent_kind] => B2
[patent_issue_date] => 2008-04-29
[patent_title] => 'Method of manufacturing NOR-type mask ROM device and semiconductor device including the same'
[patent_app_type] => utility
[patent_app_number] => 11/882656
[patent_app_country] => US
[patent_app_date] => 2007-08-03
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[patent_maintenance] => 1
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[pdf_file] => patents/07/364/07364973.pdf
[firstpage_image] =>[orig_patent_app_number] => 11882656
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/882656 | Method of manufacturing NOR-type mask ROM device and semiconductor device including the same | Aug 2, 2007 | Issued |
| 90/008666 | SEMICONDUCTOR DEVICE RECONCILING DIFFERENT TIMING SIGNALS | Jul 19, 2007 | Issued |
Array
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[patent_doc_number] => 07482222
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[patent_issue_date] => 2009-01-27
[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[patent_app_number] => 11/769276
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/769276 | Semiconductor device and method of manufacturing the same | Jun 26, 2007 | Issued |
| 90/008667 | SEMICONDUCTOR DEVICE RECONCILING DIFFERENT TIMING SIGNALS | Jun 20, 2007 | Issued |
Array
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[id] => 573944
[patent_doc_number] => 07459399
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[patent_issue_date] => 2008-12-02
[patent_title] => 'Method for manufacturing probe structure of probe card'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756686 | Method for manufacturing probe structure of probe card | May 31, 2007 | Issued |
Array
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[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'METHOD OF MANUFACTURING A FLASH MEMORY DEVICE'
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Array
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[patent_title] => 'SEMICONDUCTOR DEVICE'
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Array
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[patent_title] => 'MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/733673 | Multi-step process for forming a barrier film for use in copper layer formation | Apr 9, 2007 | Issued |
Array
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[patent_title] => 'Method of fabricating nonvolatile memory device'
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[patent_app_number] => 11/686205
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686205 | Method of fabricating nonvolatile memory device | Mar 13, 2007 | Issued |
Array
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[id] => 4988791
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[patent_issue_date] => 2007-07-05
[patent_title] => 'STRAINED Si MOSFET ON TENSILE-STRAINED SiGe-ON-INSULATOR (SGOI)'
[patent_app_type] => utility
[patent_app_number] => 11/684855
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/684855 | Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) | Mar 11, 2007 | Issued |
Array
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[patent_title] => 'Method of reducing film stress on overlay mark'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/715527 | Method of reducing film stress on overlay mark | Mar 6, 2007 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/709270 | Semiconductor device and manufacturing method of semiconductor device | Feb 21, 2007 | Issued |
Array
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[id] => 428567
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[patent_title] => 'Enhancement of grain structure for contacts'
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Array
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[id] => 4749243
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[patent_title] => 'STRUCTURE AND METHOD FOR STOCHASTIC INTEGRATED CIRCUIT PERSONALIZATION'
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[patent_app_number] => 11/619196
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/619196 | Structure and method for stochastic integrated circuit personalization | Jan 2, 2007 | Issued |
Array
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Array
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Array
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Array
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Array
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