Search

Tuan Pham

Examiner (ID: 14490, Phone: (571)272-8097 , Office: P/2649 )

Most Active Art Unit
2649
Art Unit(s)
2649, 2618, 2647, 2643
Total Applications
1757
Issued Applications
1443
Pending Applications
70
Abandoned Applications
275

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2763389 [patent_doc_number] => 05059833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Phase detector suitable for use in phase lock loop' [patent_app_type] => 1 [patent_app_number] => 7/599196 [patent_app_country] => US [patent_app_date] => 1990-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2554 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/059/05059833.pdf [firstpage_image] =>[orig_patent_app_number] => 599196 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/599196
Phase detector suitable for use in phase lock loop Oct 16, 1990 Issued
Array ( [id] => 2840772 [patent_doc_number] => 05121003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'Zero overhead self-timed iterative logic' [patent_app_type] => 1 [patent_app_number] => 7/595350 [patent_app_country] => US [patent_app_date] => 1990-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4345 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121003.pdf [firstpage_image] =>[orig_patent_app_number] => 595350 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/595350
Zero overhead self-timed iterative logic Oct 9, 1990 Issued
Array ( [id] => 2710409 [patent_doc_number] => 05068550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'ECL-TTL signal level converter' [patent_app_type] => 1 [patent_app_number] => 7/594732 [patent_app_country] => US [patent_app_date] => 1990-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2163 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068550.pdf [firstpage_image] =>[orig_patent_app_number] => 594732 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/594732
ECL-TTL signal level converter Oct 8, 1990 Issued
Array ( [id] => 2737231 [patent_doc_number] => 05039876 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-13 [patent_title] => 'Radiation hardened bistable logic circuit' [patent_app_type] => 1 [patent_app_number] => 7/594911 [patent_app_country] => US [patent_app_date] => 1990-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2214 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/039/05039876.pdf [firstpage_image] =>[orig_patent_app_number] => 594911 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/594911
Radiation hardened bistable logic circuit Oct 8, 1990 Issued
Array ( [id] => 2672555 [patent_doc_number] => 05070257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'Circuitry for controlled rate of power application to CMOS microcircuits' [patent_app_type] => 1 [patent_app_number] => 7/590098 [patent_app_country] => US [patent_app_date] => 1990-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2053 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070257.pdf [firstpage_image] =>[orig_patent_app_number] => 590098 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/590098
Circuitry for controlled rate of power application to CMOS microcircuits Sep 27, 1990 Issued
Array ( [id] => 2674416 [patent_doc_number] => 05034626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-23 [patent_title] => 'BIMOS current bias with low temperature coefficient' [patent_app_type] => 1 [patent_app_number] => 7/583750 [patent_app_country] => US [patent_app_date] => 1990-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1844 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/034/05034626.pdf [firstpage_image] =>[orig_patent_app_number] => 583750 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/583750
BIMOS current bias with low temperature coefficient Sep 16, 1990 Issued
Array ( [id] => 2713856 [patent_doc_number] => 05041741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-20 [patent_title] => 'Transient immune input buffer' [patent_app_type] => 1 [patent_app_number] => 7/582461 [patent_app_country] => US [patent_app_date] => 1990-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1888 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/041/05041741.pdf [firstpage_image] =>[orig_patent_app_number] => 582461 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/582461
Transient immune input buffer Sep 13, 1990 Issued
Array ( [id] => 2697510 [patent_doc_number] => 05019728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'High speed CMOS backpanel transceiver' [patent_app_type] => 1 [patent_app_number] => 7/580017 [patent_app_country] => US [patent_app_date] => 1990-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2077 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/019/05019728.pdf [firstpage_image] =>[orig_patent_app_number] => 580017 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/580017
High speed CMOS backpanel transceiver Sep 9, 1990 Issued
07/579260 ANALOG SUPERBUFFER Sep 4, 1990 Abandoned
Array ( [id] => 2852045 [patent_doc_number] => 05111076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Digital superbuffer' [patent_app_type] => 1 [patent_app_number] => 7/577791 [patent_app_country] => US [patent_app_date] => 1990-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3391 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111076.pdf [firstpage_image] =>[orig_patent_app_number] => 577791 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/577791
Digital superbuffer Sep 4, 1990 Issued
Array ( [id] => 2727006 [patent_doc_number] => 05025182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-18 [patent_title] => 'Digital apparatus for generating gating signals in response to a data signal' [patent_app_type] => 1 [patent_app_number] => 7/576610 [patent_app_country] => US [patent_app_date] => 1990-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3410 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/025/05025182.pdf [firstpage_image] =>[orig_patent_app_number] => 576610 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/576610
Digital apparatus for generating gating signals in response to a data signal Aug 30, 1990 Issued
Array ( [id] => 2726989 [patent_doc_number] => 05025181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-18 [patent_title] => 'Apparatus for generating digital gating signals in response to a digital data signal' [patent_app_type] => 1 [patent_app_number] => 7/576060 [patent_app_country] => US [patent_app_date] => 1990-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2143 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/025/05025181.pdf [firstpage_image] =>[orig_patent_app_number] => 576060 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/576060
Apparatus for generating digital gating signals in response to a digital data signal Aug 30, 1990 Issued
Array ( [id] => 2831459 [patent_doc_number] => 05117134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'CMOS or TTL to ECL level conversion device' [patent_app_type] => 1 [patent_app_number] => 7/573402 [patent_app_country] => US [patent_app_date] => 1990-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1221 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117134.pdf [firstpage_image] =>[orig_patent_app_number] => 573402 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/573402
CMOS or TTL to ECL level conversion device Aug 23, 1990 Issued
Array ( [id] => 2711906 [patent_doc_number] => 05055707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Method and apparatus for single step clocking on signal paths longer than a clock cycle' [patent_app_type] => 1 [patent_app_number] => 7/568169 [patent_app_country] => US [patent_app_date] => 1990-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2548 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/055/05055707.pdf [firstpage_image] =>[orig_patent_app_number] => 568169 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/568169
Method and apparatus for single step clocking on signal paths longer than a clock cycle Aug 15, 1990 Issued
Array ( [id] => 2863448 [patent_doc_number] => 05166542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'Signal converter for converting analog signal into pulse signal and control system using the same' [patent_app_type] => 1 [patent_app_number] => 7/563325 [patent_app_country] => US [patent_app_date] => 1990-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 3522 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/166/05166542.pdf [firstpage_image] =>[orig_patent_app_number] => 563325 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/563325
Signal converter for converting analog signal into pulse signal and control system using the same Aug 6, 1990 Issued
Array ( [id] => 2880885 [patent_doc_number] => 05159206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Power up reset circuit' [patent_app_type] => 1 [patent_app_number] => 7/561536 [patent_app_country] => US [patent_app_date] => 1990-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6088 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/159/05159206.pdf [firstpage_image] =>[orig_patent_app_number] => 561536 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/561536
Power up reset circuit Jul 30, 1990 Issued
07/560134 EMITTER EMITTER LOGIC (EEL) AND EMITTER COLLECTOR DOTTED LOGIC (ECDL) FAMILIES Jul 30, 1990 Abandoned
Array ( [id] => 2685925 [patent_doc_number] => 05045723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Multiple input CMOS logic circuits' [patent_app_type] => 1 [patent_app_number] => 7/560381 [patent_app_country] => US [patent_app_date] => 1990-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3366 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/045/05045723.pdf [firstpage_image] =>[orig_patent_app_number] => 560381 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/560381
Multiple input CMOS logic circuits Jul 30, 1990 Issued
Array ( [id] => 2675684 [patent_doc_number] => 05073726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-17 [patent_title] => 'Input circuit of semiconductor integrated circuit and semiconductor integrated circuit having input circuit' [patent_app_type] => 1 [patent_app_number] => 7/559139 [patent_app_country] => US [patent_app_date] => 1990-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4022 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/073/05073726.pdf [firstpage_image] =>[orig_patent_app_number] => 559139 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/559139
Input circuit of semiconductor integrated circuit and semiconductor integrated circuit having input circuit Jul 29, 1990 Issued
Array ( [id] => 2777880 [patent_doc_number] => 05075581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-24 [patent_title] => 'ECL to TTL voltage level converter using CMOS and BiCMOS circuitry' [patent_app_type] => 1 [patent_app_number] => 7/557706 [patent_app_country] => US [patent_app_date] => 1990-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2946 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/075/05075581.pdf [firstpage_image] =>[orig_patent_app_number] => 557706 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/557706
ECL to TTL voltage level converter using CMOS and BiCMOS circuitry Jul 24, 1990 Issued
Menu