Tuan T. Nguyen

Array ( [id] => 11453009 [patent_doc_number] => 09576657 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Memory cells including vertically oriented adjustable resistance structures' [patent_app_type] => utility [patent_app_number] => 14/869231 [patent_app_country] => US [patent_app_date] => 2015-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 36 [patent_no_of_words] => 13703 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14869231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10659330 [patent_doc_number] => 20160005474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'MEMORY DEVICES AND PROGRAMMING MEMORY ARRAYS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/857475 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 23777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11781879 [patent_doc_number] => 09391079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making' [patent_app_type] => utility [patent_app_number] => 14/856943 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 115 [patent_figures_cnt] => 140 [patent_no_of_words] => 31622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11259203 [patent_doc_number] => 09484105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/842382 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 11208 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10659610 [patent_doc_number] => 20160005750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Semiconductor Device Having Electrically Floating Body Transistor, Semiconductor Device Having Both Volatile and Non-Volatile Functionality and Method of Operating' [patent_app_type] => utility [patent_app_number] => 14/834695 [patent_app_country] => US [patent_app_date] => 2015-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 392 [patent_figures_cnt] => 392 [patent_no_of_words] => 134283 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14834695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11193155 [patent_doc_number] => 09423969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Sensing operations in a memory device' [patent_app_type] => utility [patent_app_number] => 14/827371 [patent_app_country] => US [patent_app_date] => 2015-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14827371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10495069 [patent_doc_number] => 20150380091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'METHODS OF PROGRAMMING MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/822083 [patent_app_country] => US [patent_app_date] => 2015-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4775 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14822083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11781579 [patent_doc_number] => 09390777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Memory controller for strobe-based memory systems' [patent_app_type] => utility [patent_app_number] => 14/821101 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14821101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11346051 [patent_doc_number] => 09530463 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Memory device and method thereof' [patent_app_type] => utility [patent_app_number] => 14/815158 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14815158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11417752 [patent_doc_number] => 09564586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Electronic device and operation method thereof' [patent_app_type] => utility [patent_app_number] => 14/807599 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11985 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14807599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11293495 [patent_doc_number] => 20160343427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'COMPLEMENTARY BIPOLAR SRAM' [patent_app_type] => utility [patent_app_number] => 14/793561 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6893 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10631583 [patent_doc_number] => 09349739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'OTP memory' [patent_app_type] => utility [patent_app_number] => 14/791913 [patent_app_country] => US [patent_app_date] => 2015-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4505 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14791913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10394443 [patent_doc_number] => 20150279450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'Data-Aware SRAM Systems and Methods Forming Same' [patent_app_type] => utility [patent_app_number] => 14/738749 [patent_app_country] => US [patent_app_date] => 2015-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14738749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11043286 [patent_doc_number] => 20160240242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'MEMORY DEVICE, MEMORY MODULE INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/734101 [patent_app_country] => US [patent_app_date] => 2015-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14734101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10384991 [patent_doc_number] => 20150269999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'APPARATUSES AND METHODS FOR PROVIDING SET AND RESET VOLTAGES AT THE SAME TIME' [patent_app_type] => utility [patent_app_number] => 14/733603 [patent_app_country] => US [patent_app_date] => 2015-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3445 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14733603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10377679 [patent_doc_number] => 20150262686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'ERASE SYSTEM AND METHOD OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/723525 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 31346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10583516 [patent_doc_number] => 09305640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Asymmetric log-likelihood ratio for flash channel' [patent_app_type] => utility [patent_app_number] => 14/724770 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14724770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10377679 [patent_doc_number] => 20150262686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'ERASE SYSTEM AND METHOD OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/723525 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 31346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10463588 [patent_doc_number] => 20150348603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, A MEMORY MODULE INCLUDING THE SAME, AND A MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/723614 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13402 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10377679 [patent_doc_number] => 20150262686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'ERASE SYSTEM AND METHOD OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/723525 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 31346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723525 [rel_patent_id] =>[rel_patent_doc_number] =>)