Search

Tuan T. Nguyen

Examiner (ID: 11337)

Most Active Art Unit
2824
Art Unit(s)
2824, 2818
Total Applications
1795
Issued Applications
1747
Pending Applications
26
Abandoned Applications
27

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10285752 [patent_doc_number] => 20150170750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'Methods Applying a Non-Zero Voltage Differential Across a Memory Cell Not Involved in an Access Operation' [patent_app_type] => utility [patent_app_number] => 14/625186 [patent_app_country] => US [patent_app_date] => 2015-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14625186 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/625186
Methods applying a non-zero voltage differential across a memory cell not involved in an access operation Feb 17, 2015 Issued
Array ( [id] => 10294251 [patent_doc_number] => 20150179250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY' [patent_app_type] => utility [patent_app_number] => 14/624891 [patent_app_country] => US [patent_app_date] => 2015-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14624891 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/624891
Access signal adjustment circuits and methods for memory cells in a cross-point array Feb 17, 2015 Issued
Array ( [id] => 10402455 [patent_doc_number] => 20150287464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES' [patent_app_type] => utility [patent_app_number] => 14/618815 [patent_app_country] => US [patent_app_date] => 2015-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8134 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14618815 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/618815
Systems, methods, and apparatus for memory cells with common source lines Feb 9, 2015 Issued
Array ( [id] => 11775868 [patent_doc_number] => 09384813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Semiconductor device applicable to a multi-context programmable logic device' [patent_app_type] => utility [patent_app_number] => 14/613554 [patent_app_country] => US [patent_app_date] => 2015-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 18390 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14613554 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/613554
Semiconductor device applicable to a multi-context programmable logic device Feb 3, 2015 Issued
Array ( [id] => 10563328 [patent_doc_number] => 09287010 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'Repair system for semiconductor apparatus and repair method using the same' [patent_app_type] => utility [patent_app_number] => 14/607699 [patent_app_country] => US [patent_app_date] => 2015-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14607699 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/607699
Repair system for semiconductor apparatus and repair method using the same Jan 27, 2015 Issued
Array ( [id] => 10246398 [patent_doc_number] => 20150131394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'METHOD AND APPARATUS FOR READ ASSIST TO COMPENSATE FOR WEAK BIT' [patent_app_type] => utility [patent_app_number] => 14/603393 [patent_app_country] => US [patent_app_date] => 2015-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14603393 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/603393
Method and apparatus for read assist to compensate for weak bit Jan 22, 2015 Issued
Array ( [id] => 10645122 [patent_doc_number] => 09361995 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Flash memory system using complementary voltage supplies' [patent_app_type] => utility [patent_app_number] => 14/602262 [patent_app_country] => US [patent_app_date] => 2015-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 6827 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14602262 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/602262
Flash memory system using complementary voltage supplies Jan 20, 2015 Issued
Array ( [id] => 10802821 [patent_doc_number] => 20160148978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'RESISTIVE RANDOM ACCESS MEMORY STRUCTURE AND METHOD FOR OPERATING RESISTIVE RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 14/601252 [patent_app_country] => US [patent_app_date] => 2015-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5024 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14601252 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/601252
Resistive random access memory structure and method for operating resistive random access memory Jan 20, 2015 Issued
Array ( [id] => 11286256 [patent_doc_number] => 09502113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Configurable non-volatile content addressable memory' [patent_app_type] => utility [patent_app_number] => 14/596886 [patent_app_country] => US [patent_app_date] => 2015-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 8794 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14596886 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/596886
Configurable non-volatile content addressable memory Jan 13, 2015 Issued
Array ( [id] => 11489241 [patent_doc_number] => 09595313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/594260 [patent_app_country] => US [patent_app_date] => 2015-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 12327 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14594260 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/594260
Semiconductor device Jan 11, 2015 Issued
Array ( [id] => 10195558 [patent_doc_number] => 09224471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Stabilization of resistive memory' [patent_app_type] => utility [patent_app_number] => 14/593234 [patent_app_country] => US [patent_app_date] => 2015-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14593234 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/593234
Stabilization of resistive memory Jan 8, 2015 Issued
Array ( [id] => 10597620 [patent_doc_number] => 09318717 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-19 [patent_title] => 'Semi-conductor device with programmable response' [patent_app_type] => utility [patent_app_number] => 14/588997 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14588997 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/588997
Semi-conductor device with programmable response Jan 4, 2015 Issued
Array ( [id] => 10544278 [patent_doc_number] => 09269410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Leakage measurement systems' [patent_app_type] => utility [patent_app_number] => 14/584584 [patent_app_country] => US [patent_app_date] => 2014-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14584584 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/584584
Leakage measurement systems Dec 28, 2014 Issued
Array ( [id] => 10645118 [patent_doc_number] => 09361991 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Efficient scanning of nonvolatile memory blocks' [patent_app_type] => utility [patent_app_number] => 14/581748 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 11579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581748 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581748
Efficient scanning of nonvolatile memory blocks Dec 22, 2014 Issued
Array ( [id] => 10645117 [patent_doc_number] => 09361990 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Time domain ramp rate control for erase inhibit in flash memory' [patent_app_type] => utility [patent_app_number] => 14/574832 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 8260 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14574832 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/574832
Time domain ramp rate control for erase inhibit in flash memory Dec 17, 2014 Issued
Array ( [id] => 10028563 [patent_doc_number] => 09070463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Flash memory module for realizing high reliability' [patent_app_type] => utility [patent_app_number] => 14/560313 [patent_app_country] => US [patent_app_date] => 2014-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 16173 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14560313 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/560313
Flash memory module for realizing high reliability Dec 3, 2014 Issued
Array ( [id] => 10010295 [patent_doc_number] => 09053818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Mode changing circuitry' [patent_app_type] => utility [patent_app_number] => 14/549043 [patent_app_country] => US [patent_app_date] => 2014-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5003 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14549043 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/549043
Mode changing circuitry Nov 19, 2014 Issued
Array ( [id] => 10624185 [patent_doc_number] => 09343133 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-17 [patent_title] => 'Apparatuses and methods for setting a signal in variable resistance memory' [patent_app_type] => utility [patent_app_number] => 14/524567 [patent_app_country] => US [patent_app_date] => 2014-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4345 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524567 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/524567
Apparatuses and methods for setting a signal in variable resistance memory Oct 26, 2014 Issued
Array ( [id] => 10321574 [patent_doc_number] => 20150206578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'AREA-EFFICIENT, HIGH-SPEED, DYNAMIC-CIRCUIT-BASED SENSING SCHEME FOR DUAL-RAIL SRAM MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/510214 [patent_app_country] => US [patent_app_date] => 2014-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14510214 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/510214
Area-efficient, high-speed, dynamic-circuit-based sensing scheme for dual-rail SRAM memories Oct 8, 2014 Issued
Array ( [id] => 9804242 [patent_doc_number] => 20150016187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'ASYMMETRIC LOG-LIKELIHOOD RATIO FOR FLASH CHANNEL' [patent_app_type] => utility [patent_app_number] => 14/500904 [patent_app_country] => US [patent_app_date] => 2014-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6892 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14500904 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/500904
Asymmetric log-likelihood ratio for flash channel Sep 28, 2014 Issued
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