
Tuan Thieu Lam
Examiner (ID: 10501, Phone: (571)272-1744 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2836, 2843, 2816, 2842, 2504 |
| Total Applications | 3113 |
| Issued Applications | 2632 |
| Pending Applications | 157 |
| Abandoned Applications | 360 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20521841
[patent_doc_number] => 20260045950
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-12
[patent_title] => LEVEL SHIFTING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/800854
[patent_app_country] => US
[patent_app_date] => 2024-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4396
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800854
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/800854 | LEVEL SHIFTING CIRCUIT | Aug 11, 2024 | Pending |
Array
(
[id] => 19589267
[patent_doc_number] => 20240386824
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => METHOD FOR DRIVING DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/785482
[patent_app_country] => US
[patent_app_date] => 2024-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 44846
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785482
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/785482 | METHOD FOR DRIVING DISPLAY DEVICE | Jul 25, 2024 | Pending |
Array
(
[id] => 19574888
[patent_doc_number] => 20240379180
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => Semiconductor Device
[patent_app_type] => utility
[patent_app_number] => 18/784264
[patent_app_country] => US
[patent_app_date] => 2024-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15757
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 447
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784264
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/784264 | Semiconductor Device | Jul 24, 2024 | Pending |
Array
(
[id] => 19750178
[patent_doc_number] => 20250038743
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => ISOLATED SELECTOR AND ASSOCIATED ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/780442
[patent_app_country] => US
[patent_app_date] => 2024-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780442
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/780442 | ISOLATED SELECTOR AND ASSOCIATED ELECTRONIC DEVICE | Jul 21, 2024 | Pending |
Array
(
[id] => 20488929
[patent_doc_number] => 20260025131
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-22
[patent_title] => Offset Reduction for Switched Capacitor Circuitry
[patent_app_type] => utility
[patent_app_number] => 18/776557
[patent_app_country] => US
[patent_app_date] => 2024-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3158
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776557
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/776557 | Offset Reduction for Switched Capacitor Circuitry | Jul 17, 2024 | Pending |
Array
(
[id] => 20476845
[patent_doc_number] => 20260019066
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-15
[patent_title] => GLITCH-FREE POWER SUPPLY INDEPENDENT SEQUENCE CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/772977
[patent_app_country] => US
[patent_app_date] => 2024-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4773
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772977
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/772977 | Glitch-free power supply independent sequence circuit | Jul 14, 2024 | Issued |
Array
(
[id] => 19547288
[patent_doc_number] => 20240364324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => RF SWITCH WITH IMPROVED ISOLATION AT TARGET FREQUENCIES
[patent_app_type] => utility
[patent_app_number] => 18/769312
[patent_app_country] => US
[patent_app_date] => 2024-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769312
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/769312 | RF SWITCH WITH IMPROVED ISOLATION AT TARGET FREQUENCIES | Jul 9, 2024 | Pending |
Array
(
[id] => 19547277
[patent_doc_number] => 20240364313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => HIGH FREQUENCY CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/768315
[patent_app_country] => US
[patent_app_date] => 2024-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5169
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18768315
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/768315 | HIGH FREQUENCY CIRCUIT | Jul 9, 2024 | Pending |
Array
(
[id] => 20325310
[patent_doc_number] => 20250337398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => LEVEL SHIFTING CIRCUIT AND LEVEL SHIFTING CIRCUIT AND LEVEL SHIFTING METHOD BASED ON LOW POWER SOURCE
[patent_app_type] => utility
[patent_app_number] => 18/764291
[patent_app_country] => US
[patent_app_date] => 2024-07-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764291
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/764291 | LEVEL SHIFTING CIRCUIT AND LEVEL SHIFTING CIRCUIT AND LEVEL SHIFTING METHOD BASED ON LOW POWER SOURCE | Jul 3, 2024 | Pending |
Array
(
[id] => 20462752
[patent_doc_number] => 20260012182
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-08
[patent_title] => VOLTAGE LEVEL SHIFTER
[patent_app_type] => utility
[patent_app_number] => 18/764117
[patent_app_country] => US
[patent_app_date] => 2024-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2472
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764117
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/764117 | Voltage level shifter | Jul 2, 2024 | Issued |
Array
(
[id] => 20197398
[patent_doc_number] => 20250274108
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-28
[patent_title] => POSITIVE HYSTERESIS ELIMINATION COMPARISON CIRCUIT AND MOTOR DRIVER HAVING POSITIVE HYSTERESIS ELIMINATION COMPARISON CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/752816
[patent_app_country] => US
[patent_app_date] => 2024-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1223
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752816
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/752816 | Positive hysteresis elimination comparison circuit and motor driver having positive hysteresis elimination comparison circuit | Jun 24, 2024 | Issued |
Array
(
[id] => 20430205
[patent_doc_number] => 20250392298
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-25
[patent_title] => COMPARATOR FOR HIGH SPEED INTERFACE
[patent_app_type] => utility
[patent_app_number] => 18/747500
[patent_app_country] => US
[patent_app_date] => 2024-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4568
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747500
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/747500 | COMPARATOR FOR HIGH SPEED INTERFACE | Jun 18, 2024 | Pending |
Array
(
[id] => 20581763
[patent_doc_number] => 12574021
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-10
[patent_title] => Zero-current turn-off driver with safety turn-off functionality
[patent_app_type] => utility
[patent_app_number] => 18/744957
[patent_app_country] => US
[patent_app_date] => 2024-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2009
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744957
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/744957 | Zero-current turn-off driver with safety turn-off functionality | Jun 16, 2024 | Issued |
Array
(
[id] => 19485226
[patent_doc_number] => 20240333268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DAISY-CHAINED DELAY CELLS
[patent_app_type] => utility
[patent_app_number] => 18/739876
[patent_app_country] => US
[patent_app_date] => 2024-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16988
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739876
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/739876 | Method of forming semiconductor device including daisy-chained delay cells | Jun 10, 2024 | Issued |
Array
(
[id] => 20029565
[patent_doc_number] => 20250167787
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => FRACTIONAL FREQUENCY DIVIDER
[patent_app_type] => utility
[patent_app_number] => 18/680518
[patent_app_country] => US
[patent_app_date] => 2024-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1317
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680518
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/680518 | Fractional frequency divider | May 30, 2024 | Issued |
Array
(
[id] => 20003220
[patent_doc_number] => 20250141442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => HIGH VOLTAGE TOLERANT BOOTSTRAP SWITCH
[patent_app_type] => utility
[patent_app_number] => 18/660585
[patent_app_country] => US
[patent_app_date] => 2024-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660585
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/660585 | High voltage tolerant bootstrap switch | May 9, 2024 | Issued |
Array
(
[id] => 20216566
[patent_doc_number] => 12413225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Clamping circuit and offset OTA circuit thereof
[patent_app_type] => utility
[patent_app_number] => 18/655330
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 1876
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655330
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655330 | Clamping circuit and offset OTA circuit thereof | May 5, 2024 | Issued |
Array
(
[id] => 20539099
[patent_doc_number] => 12556179
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-17
[patent_title] => Mixed-signal operational circuit
[patent_app_type] => utility
[patent_app_number] => 18/655329
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 20751
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655329
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655329 | Mixed-signal operational circuit | May 5, 2024 | Issued |
Array
(
[id] => 19662838
[patent_doc_number] => 20240429903
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => OUTPUT DRIVING CIRCUIT, CLOCK CHIP, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/648472
[patent_app_country] => US
[patent_app_date] => 2024-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6932
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648472
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/648472 | OUTPUT DRIVING CIRCUIT, CLOCK CHIP, AND ELECTRONIC DEVICE | Apr 27, 2024 | Pending |
Array
(
[id] => 19557838
[patent_doc_number] => 20240369630
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => GLITCH FILTER
[patent_app_type] => utility
[patent_app_number] => 18/648172
[patent_app_country] => US
[patent_app_date] => 2024-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9502
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 450
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648172
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/648172 | GLITCH FILTER | Apr 25, 2024 | Pending |