Tuan V. Ho

Array ( [id] => 14190759 [patent_doc_number] => 20190115085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM CONFIGURED TO PERFORM TRACKING READ ON FIRST MEMORY CELLS FOLLOWED BY SHIFT READ ON SECOND MEMORY CELLS USING READ VOLTAGE CORRECTION VALUE DETERMINED DURING THE TRACKING READ [patent_app_type] => utility [patent_app_number] => 16/195738 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16463844 [patent_doc_number] => 10847198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Memory system utilizing heterogeneous magnetic tunnel junction types in a single chip [patent_app_type] => utility [patent_app_number] => 16/178105 [patent_app_country] => US [patent_app_date] => 2018-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4183 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15839951 [patent_doc_number] => 20200135258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SENSING CHARGE RECYCLING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/176891 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16339059 [patent_doc_number] => 10790026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Non-volatile memory device and system capable of executing operations asynchronously, and operation execution method of the same [patent_app_type] => utility [patent_app_number] => 16/174839 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16339059 [patent_doc_number] => 10790026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Non-volatile memory device and system capable of executing operations asynchronously, and operation execution method of the same [patent_app_type] => utility [patent_app_number] => 16/174839 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15954763 [patent_doc_number] => 10665294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Semiconductor devices, circuits and methods for read and/or write assist of an SRAM circuit portion based on voltage detection and/or temperature detection circuits [patent_app_type] => utility [patent_app_number] => 16/172787 [patent_app_country] => US [patent_app_date] => 2018-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 17290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16186878 [patent_doc_number] => 10720214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Non-volatile memory device and method for controlling the non-volatile memory device [patent_app_type] => utility [patent_app_number] => 16/172057 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15702975 [patent_doc_number] => 10607674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Stochastic switching device with adjustable randomness [patent_app_type] => utility [patent_app_number] => 16/170335 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15400771 [patent_doc_number] => 10541045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Semiconductor apparatus related to the repairing of a redundancy region [patent_app_type] => utility [patent_app_number] => 16/153007 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9543 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13878283 [patent_doc_number] => 20190035482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY INCLUDING A READ OPERATION [patent_app_type] => utility [patent_app_number] => 16/149862 [patent_app_country] => US [patent_app_date] => 2018-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16149862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15717103 [patent_doc_number] => 20200105319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => DYNAMIC RECONFIGURABLE DUAL POWER I/O RECEIVER [patent_app_type] => utility [patent_app_number] => 16/147635 [patent_app_country] => US [patent_app_date] => 2018-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147635 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15717129 [patent_doc_number] => 20200105332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => APPARATUSES AND METHODS FOR INTERNAL VOLTAGE GENERATING CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/146811 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15169531 [patent_doc_number] => 10490268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Memory access module for performing memory access management [patent_app_type] => utility [patent_app_number] => 16/127240 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10026 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16034551 [patent_doc_number] => 10679702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Memory device with voltage controller [patent_app_type] => utility [patent_app_number] => 16/125905 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125905 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14842599 [patent_doc_number] => 20190279700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => MAGNETIC MEMORY DEVICE AND WRITING METHOD FOR THE MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/125559 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14875581 [patent_doc_number] => 20190288032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => MAGNETIC STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/122239 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16264325 [patent_doc_number] => 10755766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Performing logical operations using a logical operation component based on a rate at which a digit line is discharged [patent_app_type] => utility [patent_app_number] => 16/120739 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 11234 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14163563 [patent_doc_number] => 20190108884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/120287 [patent_app_country] => US [patent_app_date] => 2018-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120287 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14284633 [patent_doc_number] => 20190139601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DEFINING DATA IN SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/112655 [patent_app_country] => US [patent_app_date] => 2018-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16112655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15563893 [patent_doc_number] => 20200066358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => Switched Source Lines for Memory Applications [patent_app_type] => utility [patent_app_number] => 16/107707 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107707 [rel_patent_id] =>[rel_patent_doc_number] =>)