Search

Tuan V. Thai

Examiner (ID: 19385, Phone: (571)272-4187 , Office: P/2135 )

Most Active Art Unit
2135
Art Unit(s)
2185, 2186, 2135, 2752, 2318
Total Applications
1739
Issued Applications
1522
Pending Applications
71
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17093725 [patent_doc_number] => 11121928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Opportunistic block transmission with time constraints [patent_app_type] => utility [patent_app_number] => 16/814604 [patent_app_country] => US [patent_app_date] => 2020-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16814604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/814604
Opportunistic block transmission with time constraints Mar 9, 2020 Issued
Array ( [id] => 17223343 [patent_doc_number] => 11175842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Method and system for performing data deduplication in a data pipeline [patent_app_type] => utility [patent_app_number] => 16/810936 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8201 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810936 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810936
Method and system for performing data deduplication in a data pipeline Mar 5, 2020 Issued
Array ( [id] => 17557960 [patent_doc_number] => 11314664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Memory access device, image processing device and imaging device [patent_app_type] => utility [patent_app_number] => 16/796071 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 33388 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16796071 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/796071
Memory access device, image processing device and imaging device Feb 19, 2020 Issued
Array ( [id] => 17038840 [patent_doc_number] => 20210255799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => OPTIMIZATION OF POWER USAGE OF DATA STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 16/791887 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791887 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791887
Optimization of power usage of data storage devices Feb 13, 2020 Issued
Array ( [id] => 18218100 [patent_doc_number] => 11593037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => File system block-level tiering and co-allocation [patent_app_type] => utility [patent_app_number] => 16/698373 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15249 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/698373
File system block-level tiering and co-allocation Nov 26, 2019 Issued
Array ( [id] => 16826440 [patent_doc_number] => 20210141733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => DYNAMIC BANKING AND BIT SEPARATION IN MEMORIES [patent_app_type] => utility [patent_app_number] => 16/680491 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680491
Dynamic banking and bit separation in memories Nov 10, 2019 Issued
Array ( [id] => 15622491 [patent_doc_number] => 20200081650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => EXTERNAL MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 16/680254 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680254
External memory controller Nov 10, 2019 Issued
Array ( [id] => 17454673 [patent_doc_number] => 11269532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Data reduction by replacement of repeating pattern with single instance [patent_app_type] => utility [patent_app_number] => 16/669172 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4852 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16669172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/669172
Data reduction by replacement of repeating pattern with single instance Oct 29, 2019 Issued
Array ( [id] => 18855628 [patent_doc_number] => 11853206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory system and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/657599 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 12284 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657599 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657599
Memory system and operation method thereof Oct 17, 2019 Issued
Array ( [id] => 17365004 [patent_doc_number] => 11232025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Method, device and computer program product for storage management [patent_app_type] => utility [patent_app_number] => 16/557949 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5925 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557949
Method, device and computer program product for storage management Aug 29, 2019 Issued
Array ( [id] => 17031579 [patent_doc_number] => 11093391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Representing a cache line bit pattern via meta signaling [patent_app_type] => utility [patent_app_number] => 16/557628 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8475 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557628 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557628
Representing a cache line bit pattern via meta signaling Aug 29, 2019 Issued
Array ( [id] => 16675505 [patent_doc_number] => 20210064271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MEMORY WITH AUTOMATIC BACKGROUND PRECONDITION UPON POWERUP [patent_app_type] => utility [patent_app_number] => 16/553859 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553859
Memory with automatic background precondition upon powerup Aug 27, 2019 Issued
Array ( [id] => 19375679 [patent_doc_number] => 12067249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Data shaping to reduce memory wear in a multi-tenant database [patent_app_type] => utility [patent_app_number] => 16/550031 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8059 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550031
Data shaping to reduce memory wear in a multi-tenant database Aug 22, 2019 Issued
Array ( [id] => 15214385 [patent_doc_number] => 20190369879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => UNIFIED ADDRESSING AND HIERARCHICAL HETEROGENEOUS STORAGE AND MEMORY [patent_app_type] => utility [patent_app_number] => 16/543511 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543511
Unified addressing and hierarchical heterogeneous storage and memory Aug 15, 2019 Issued
Array ( [id] => 17308905 [patent_doc_number] => 11210015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Data storage device, operation method thereof, and storage system having the same [patent_app_type] => utility [patent_app_number] => 16/536973 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16536973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/536973
Data storage device, operation method thereof, and storage system having the same Aug 8, 2019 Issued
Array ( [id] => 17499273 [patent_doc_number] => 11287979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Congestion mitigation in a multi-tiered distributed storage system [patent_app_type] => utility [patent_app_number] => 16/530088 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8219 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530088 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530088
Congestion mitigation in a multi-tiered distributed storage system Aug 1, 2019 Issued
Array ( [id] => 16615587 [patent_doc_number] => 20210034240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => SYSTEM AND METHOD FOR SMART POOL SPACE RECLAMATION [patent_app_type] => utility [patent_app_number] => 16/530764 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530764
System and method for smart pool space reclamation Aug 1, 2019 Issued
Array ( [id] => 17408798 [patent_doc_number] => 11249679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Selecting a write operation mode from multiple write operation modes [patent_app_type] => utility [patent_app_number] => 16/527815 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11524 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527815 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527815
Selecting a write operation mode from multiple write operation modes Jul 30, 2019 Issued
Array ( [id] => 15367473 [patent_doc_number] => 20200019501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => PHASE CHANGE MEMORY IN A DUAL INLINE MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 16/518869 [patent_app_country] => US [patent_app_date] => 2019-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16518869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/518869
Phase change memory in a dual inline memory module Jul 21, 2019 Issued
Array ( [id] => 16584662 [patent_doc_number] => 20210019064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => MAPPED CLUSTER STRETCHING FOR INCREASING WORKLOAD IN A DATA STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/511161 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8527 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511161
Mapped cluster stretching for increasing workload in a data storage system Jul 14, 2019 Issued
Menu