Search

Tucker J. Wright

Examiner (ID: 15299, Phone: (571)270-3234 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891, 2896
Total Applications
1156
Issued Applications
873
Pending Applications
108
Abandoned Applications
203

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6106176 [patent_doc_number] => 20110186998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'RECESSED SEMICONDUCTOR SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/012644 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8420 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20110186998.pdf [firstpage_image] =>[orig_patent_app_number] => 13012644 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/012644
Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate Jan 23, 2011 Issued
Array ( [id] => 9100158 [patent_doc_number] => 08564037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Semiconductor device having isolation groove and device formation portion' [patent_app_type] => utility [patent_app_number] => 13/012305 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 71 [patent_no_of_words] => 9965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13012305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/012305
Semiconductor device having isolation groove and device formation portion Jan 23, 2011 Issued
Array ( [id] => 8154795 [patent_doc_number] => 20120098076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'ACOUSTIC SENSOR AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/012489 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20120098076.pdf [firstpage_image] =>[orig_patent_app_number] => 13012489 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/012489
Acoustic sensor Jan 23, 2011 Issued
Array ( [id] => 8701963 [patent_doc_number] => 08395186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Implementing vertical signal repeater transistors utilizing wire vias as gate nodes' [patent_app_type] => utility [patent_app_number] => 13/005059 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2885 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005059
Implementing vertical signal repeater transistors utilizing wire vias as gate nodes Jan 11, 2011 Issued
Array ( [id] => 9086891 [patent_doc_number] => 08558321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Semiconductor device having gate insulating film including high dielectric material' [patent_app_type] => utility [patent_app_number] => 13/005085 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 44 [patent_no_of_words] => 10827 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005085 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005085
Semiconductor device having gate insulating film including high dielectric material Jan 11, 2011 Issued
Array ( [id] => 8287425 [patent_doc_number] => 20120175755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING A HEAT SPREADER' [patent_app_type] => utility [patent_app_number] => 13/005279 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005279 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005279
SEMICONDUCTOR DEVICE INCLUDING A HEAT SPREADER Jan 11, 2011 Abandoned
Array ( [id] => 8224882 [patent_doc_number] => 20120139089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'MODULE IC PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/005084 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4498 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005084
MODULE IC PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME Jan 11, 2011 Abandoned
Array ( [id] => 8796984 [patent_doc_number] => 08435851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Implementing semiconductor SoC with metal via gate node high performance stacked transistors' [patent_app_type] => utility [patent_app_number] => 13/005089 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3078 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005089 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005089
Implementing semiconductor SoC with metal via gate node high performance stacked transistors Jan 11, 2011 Issued
Array ( [id] => 8287447 [patent_doc_number] => 20120175777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'DEVICE HAVING CONDUCTIVE SUBSTRATE VIA WITH CATCH-PAD ETCH-STOP' [patent_app_type] => utility [patent_app_number] => 13/005240 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13005240 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005240
Device having conductive substrate via with catch-pad etch-stop Jan 11, 2011 Issued
Array ( [id] => 8237476 [patent_doc_number] => 20120146215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'BONDING PAD STRUCTURE AND INTEGRATED CIRCUIT COMPRISING A PLURALITY OF BONDING PAD STRUCTURES' [patent_app_type] => utility [patent_app_number] => 12/983895 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1696 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983895 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/983895
BONDING PAD STRUCTURE AND INTEGRATED CIRCUIT COMPRISING A PLURALITY OF BONDING PAD STRUCTURES Jan 3, 2011 Abandoned
Array ( [id] => 6042343 [patent_doc_number] => 20110204420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'INTERCONNECTION STRUCTURE OF THREE-DIMENSIONAL SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/983903 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7792 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204420.pdf [firstpage_image] =>[orig_patent_app_number] => 12983903 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/983903
Interconnection structure of three-dimensional semiconductor device Jan 3, 2011 Issued
Array ( [id] => 6099034 [patent_doc_number] => 20110163452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SUBSTRATE PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/984018 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 20372 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20110163452.pdf [firstpage_image] =>[orig_patent_app_number] => 12984018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984018
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SUBSTRATE PROCESSING APPARATUS Jan 3, 2011 Abandoned
Array ( [id] => 8470365 [patent_doc_number] => 08299544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Field effect transistor having ohmic body contact(s), an integrated circuit structure incorporating stacked field effect transistors with such ohmic body contacts and associated methods' [patent_app_type] => utility [patent_app_number] => 12/983925 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 14903 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983925 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/983925
Field effect transistor having ohmic body contact(s), an integrated circuit structure incorporating stacked field effect transistors with such ohmic body contacts and associated methods Jan 3, 2011 Issued
Array ( [id] => 9937943 [patent_doc_number] => 08987756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Diffusion type LED apparatus utilizing dye-sensitized solar cells' [patent_app_type] => utility [patent_app_number] => 13/992558 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3248 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13992558 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/992558
Diffusion type LED apparatus utilizing dye-sensitized solar cells Dec 28, 2010 Issued
Array ( [id] => 8178172 [patent_doc_number] => 08178904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Gate array' [patent_app_type] => utility [patent_app_number] => 12/964796 [patent_app_country] => US [patent_app_date] => 2010-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3411 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/178/08178904.pdf [firstpage_image] =>[orig_patent_app_number] => 12964796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964796
Gate array Dec 9, 2010 Issued
Array ( [id] => 6026946 [patent_doc_number] => 20110079847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/928272 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1823 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20110079847.pdf [firstpage_image] =>[orig_patent_app_number] => 12928272 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/928272
Semiconductor Device Dec 6, 2010 Abandoned
Array ( [id] => 8167385 [patent_doc_number] => 20120105095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'SILICON-ON-INSULATOR (SOI) BODY-CONTACT PASS GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/938440 [patent_app_country] => US [patent_app_date] => 2010-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3375 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20120105095.pdf [firstpage_image] =>[orig_patent_app_number] => 12938440 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938440
SILICON-ON-INSULATOR (SOI) BODY-CONTACT PASS GATE STRUCTURE Nov 2, 2010 Abandoned
Array ( [id] => 8356686 [patent_doc_number] => 20120211841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'OTP MEMORY CELL HAVING LOW CURRENT LEAKAGE' [patent_app_type] => utility [patent_app_number] => 13/504295 [patent_app_country] => US [patent_app_date] => 2010-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13504295 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/504295
OTP memory cell having low current leakage Oct 28, 2010 Issued
Array ( [id] => 7504651 [patent_doc_number] => 08035149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Nonvolatile memory devices with oblique charge storage regions and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 12/913865 [patent_app_country] => US [patent_app_date] => 2010-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 5827 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035149.pdf [firstpage_image] =>[orig_patent_app_number] => 12913865 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/913865
Nonvolatile memory devices with oblique charge storage regions and methods of forming the same Oct 27, 2010 Issued
Array ( [id] => 5951103 [patent_doc_number] => 20110032763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING FIRST AND SECOND BIT LINES' [patent_app_type] => utility [patent_app_number] => 12/909223 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 10819 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20110032763.pdf [firstpage_image] =>[orig_patent_app_number] => 12909223 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909223
SEMICONDUCTOR DEVICES INCLUDING FIRST AND SECOND BIT LINES Oct 20, 2010 Abandoned
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