Tucker J. Wright

Array ( [id] => 8356686 [patent_doc_number] => 20120211841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'OTP MEMORY CELL HAVING LOW CURRENT LEAKAGE' [patent_app_type] => utility [patent_app_number] => 13/504295 [patent_app_country] => US [patent_app_date] => 2010-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13504295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7504651 [patent_doc_number] => 08035149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Nonvolatile memory devices with oblique charge storage regions and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 12/913865 [patent_app_country] => US [patent_app_date] => 2010-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 5827 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035149.pdf [firstpage_image] =>[orig_patent_app_number] => 12913865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5951103 [patent_doc_number] => 20110032763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING FIRST AND SECOND BIT LINES' [patent_app_type] => utility [patent_app_number] => 12/909223 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 10819 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20110032763.pdf [firstpage_image] =>[orig_patent_app_number] => 12909223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6120768 [patent_doc_number] => 20110084322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'CMOS IMAGE SENSOR AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/899473 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 3985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084322.pdf [firstpage_image] =>[orig_patent_app_number] => 12899473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6027192 [patent_doc_number] => 20110079929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'KIT FOR OPTICAL SEMICONDUCTOR ENCAPSULATION' [patent_app_type] => utility [patent_app_number] => 12/898897 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4404 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20110079929.pdf [firstpage_image] =>[orig_patent_app_number] => 12898897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6026874 [patent_doc_number] => 20110079816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'OPTICAL-SEMICONDUCTOR ENCAPSULATING MATERIAL' [patent_app_type] => utility [patent_app_number] => 12/898949 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4905 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20110079816.pdf [firstpage_image] =>[orig_patent_app_number] => 12898949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6036462 [patent_doc_number] => 20110089519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'Chip Lead Frame and Photoelectric Energy Transducing Module' [patent_app_type] => utility [patent_app_number] => 12/898943 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3755 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089519.pdf [firstpage_image] =>[orig_patent_app_number] => 12898943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8123035 [patent_doc_number] => 20120086068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'METHOD FOR DEPOSITING A DIELECTRIC ONTO A FLOATING GATE FOR STRAINED SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 12/898737 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2881 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20120086068.pdf [firstpage_image] =>[orig_patent_app_number] => 12898737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8982654 [patent_doc_number] => 08513774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Low-voltage structure for high-voltage electrostatic discharge protection' [patent_app_type] => utility [patent_app_number] => 12/899181 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3222 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8592470 [patent_doc_number] => 08350347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Writable magnetic element' [patent_app_type] => utility [patent_app_number] => 12/899072 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 6517 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8458473 [patent_doc_number] => 08294143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Display unit including a multlayer structure' [patent_app_type] => utility [patent_app_number] => 12/899133 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12517 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899133 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9154207 [patent_doc_number] => 08587114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Multichip electronic packages and methods of manufacture' [patent_app_type] => utility [patent_app_number] => 12/897933 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3430 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12897933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9140930 [patent_doc_number] => 08581394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Semiconductor package module and electric circuit assembly with the same' [patent_app_type] => utility [patent_app_number] => 12/897842 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4145 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12897842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8090307 [patent_doc_number] => 20120080761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'SEMICONDUCTOR HAVING A HIGH ASPECT RATIO VIA' [patent_app_type] => utility [patent_app_number] => 12/898408 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20120080761.pdf [firstpage_image] =>[orig_patent_app_number] => 12898408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6052405 [patent_doc_number] => 20110108987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/897941 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1801 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20110108987.pdf [firstpage_image] =>[orig_patent_app_number] => 12897941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9677438 [patent_doc_number] => 08816349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Semiconductor device comprising oxide semiconductor layer' [patent_app_type] => utility [patent_app_number] => 12/898357 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 94 [patent_no_of_words] => 48852 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12898357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8921506 [patent_doc_number] => 08487445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-16 [patent_title] => 'Semiconductor device having through electrodes protruding from dielectric layer' [patent_app_type] => utility [patent_app_number] => 12/898192 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2687 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12898192 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7496897 [patent_doc_number] => 20110260337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/898198 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20110260337.pdf [firstpage_image] =>[orig_patent_app_number] => 12898198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8422220 [patent_doc_number] => 08278709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'High voltage metal-oxide-semiconductor transistor with stable threshold voltage and related manufacturing method' [patent_app_type] => utility [patent_app_number] => 12/898668 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1524 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12898668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9402338 [patent_doc_number] => 08692392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Crack stop barrier and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 12/898468 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4216 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12898468 [rel_patent_id] =>[rel_patent_doc_number] =>)