Search

Tucker J. Wright

Examiner (ID: 7690, Phone: (571)270-3234 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891, 2896
Total Applications
1139
Issued Applications
862
Pending Applications
104
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6145325 [patent_doc_number] => 20110018028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/891842 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 9432 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20110018028.pdf [firstpage_image] =>[orig_patent_app_number] => 12891842 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891842
Semiconductor device Sep 27, 2010 Issued
Array ( [id] => 6130604 [patent_doc_number] => 20110006366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Coupling Well Structure for Improving HVMOS Performance' [patent_app_type] => utility [patent_app_number] => 12/887300 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006366.pdf [firstpage_image] =>[orig_patent_app_number] => 12887300 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887300
Coupling well structure for improving HVMOS performance Sep 20, 2010 Issued
Array ( [id] => 6569954 [patent_doc_number] => 20100320475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'ETCHING TECHNIQUE FOR THE FABRICATION OF THIN (Al, In, Ga)N LAYERS' [patent_app_type] => utility [patent_app_number] => 12/873947 [patent_app_country] => US [patent_app_date] => 2010-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5697 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20100320475.pdf [firstpage_image] =>[orig_patent_app_number] => 12873947 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/873947
ETCHING TECHNIQUE FOR THE FABRICATION OF THIN (Al, In, Ga)N LAYERS Aug 31, 2010 Abandoned
Array ( [id] => 4546643 [patent_doc_number] => 07960233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification' [patent_app_type] => utility [patent_app_number] => 12/806746 [patent_app_country] => US [patent_app_date] => 2010-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 3525 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960233.pdf [firstpage_image] =>[orig_patent_app_number] => 12806746 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/806746
MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification Aug 20, 2010 Issued
Array ( [id] => 11201401 [patent_doc_number] => 09431623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Flexible devices including semiconductor nanocrystals, arrays, and methods' [patent_app_type] => utility [patent_app_number] => 12/851336 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 15457 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12851336 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/851336
Flexible devices including semiconductor nanocrystals, arrays, and methods Aug 4, 2010 Issued
Array ( [id] => 7716911 [patent_doc_number] => 20120007052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'Apparatus, System, and Method for Dual-Channel Nanowire FET Device' [patent_app_type] => utility [patent_app_number] => 12/831839 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4740 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007052.pdf [firstpage_image] =>[orig_patent_app_number] => 12831839 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/831839
Method for dual-channel nanowire FET device Jul 6, 2010 Issued
Array ( [id] => 6507597 [patent_doc_number] => 20100219476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'ELECTROSTATIC PROTECTION DEVICE FOR SEMICONDUCTOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/778328 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2698 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20100219476.pdf [firstpage_image] =>[orig_patent_app_number] => 12778328 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778328
ELECTROSTATIC PROTECTION DEVICE FOR SEMICONDUCTOR CIRCUIT May 11, 2010 Abandoned
Array ( [id] => 6441217 [patent_doc_number] => 20100279491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'DIE ATTACH FILM-PROVIDED DICING TAPE AND PRODUCTION PROCESS OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/769959 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 17312 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20100279491.pdf [firstpage_image] =>[orig_patent_app_number] => 12769959 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/769959
DIE ATTACH FILM-PROVIDED DICING TAPE AND PRODUCTION PROCESS OF SEMICONDUCTOR DEVICE Apr 28, 2010 Abandoned
Array ( [id] => 6492296 [patent_doc_number] => 20100200663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/767909 [patent_app_country] => US [patent_app_date] => 2010-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16360 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200663.pdf [firstpage_image] =>[orig_patent_app_number] => 12767909 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/767909
Semiconductor device and product tracing system utilizing the semiconductor device having top and bottom fibrous sealing layers Apr 26, 2010 Issued
Array ( [id] => 8560409 [patent_doc_number] => 08334474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-18 [patent_title] => 'One-sided spot welding device utilizing workpiece holding electromagnet and method of use thereof' [patent_app_type] => utility [patent_app_number] => 12/750802 [patent_app_country] => US [patent_app_date] => 2010-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3295 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12750802 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/750802
One-sided spot welding device utilizing workpiece holding electromagnet and method of use thereof Mar 30, 2010 Issued
Array ( [id] => 6286005 [patent_doc_number] => 20100237388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'HIGH ON-STATE BREAKDOWN HETEROJUNCTION BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 12/731719 [patent_app_country] => US [patent_app_date] => 2010-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9121 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20100237388.pdf [firstpage_image] =>[orig_patent_app_number] => 12731719 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/731719
HIGH ON-STATE BREAKDOWN HETEROJUNCTION BIPOLAR TRANSISTOR Mar 24, 2010 Abandoned
Array ( [id] => 4462304 [patent_doc_number] => 07880228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Semiconductor device including MISFET' [patent_app_type] => utility [patent_app_number] => 12/723251 [patent_app_country] => US [patent_app_date] => 2010-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 9073 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/880/07880228.pdf [firstpage_image] =>[orig_patent_app_number] => 12723251 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/723251
Semiconductor device including MISFET Mar 11, 2010 Issued
Array ( [id] => 7666726 [patent_doc_number] => 20110315995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/256050 [patent_app_country] => US [patent_app_date] => 2010-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5478 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13256050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/256050
Selective recrystallization of semiconductor Mar 8, 2010 Issued
Array ( [id] => 6280638 [patent_doc_number] => 20100155944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/719033 [patent_app_country] => US [patent_app_date] => 2010-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3497 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20100155944.pdf [firstpage_image] =>[orig_patent_app_number] => 12719033 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719033
Semiconductor device Mar 7, 2010 Issued
Array ( [id] => 6240208 [patent_doc_number] => 20100133616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 12/701685 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4222 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20100133616.pdf [firstpage_image] =>[orig_patent_app_number] => 12701685 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701685
METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR Feb 7, 2010 Abandoned
Array ( [id] => 6605832 [patent_doc_number] => 20100171220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'Reducing Resistivity in Interconnect Structures of Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 12/690796 [patent_app_country] => US [patent_app_date] => 2010-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2717 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171220.pdf [firstpage_image] =>[orig_patent_app_number] => 12690796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/690796
Reducing resistivity in interconnect structures of integrated circuits Jan 19, 2010 Issued
Array ( [id] => 8214888 [patent_doc_number] => 08193572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Electronic device including trenches and discontinuous storage elements' [patent_app_type] => utility [patent_app_number] => 12/647250 [patent_app_country] => US [patent_app_date] => 2009-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 12631 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/193/08193572.pdf [firstpage_image] =>[orig_patent_app_number] => 12647250 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/647250
Electronic device including trenches and discontinuous storage elements Dec 23, 2009 Issued
Array ( [id] => 6342427 [patent_doc_number] => 20100084707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'Polysilicon control etch-back indicator' [patent_app_type] => utility [patent_app_number] => 12/653130 [patent_app_country] => US [patent_app_date] => 2009-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3353 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20100084707.pdf [firstpage_image] =>[orig_patent_app_number] => 12653130 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653130
Polysilicon control etch-back indicator Dec 8, 2009 Issued
Array ( [id] => 6544674 [patent_doc_number] => 20100044762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/605556 [patent_app_country] => US [patent_app_date] => 2009-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4175 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20100044762.pdf [firstpage_image] =>[orig_patent_app_number] => 12605556 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/605556
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF Oct 25, 2009 Abandoned
Array ( [id] => 9428188 [patent_doc_number] => 08704267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Light-emitting display device' [patent_app_type] => utility [patent_app_number] => 12/579486 [patent_app_country] => US [patent_app_date] => 2009-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 5027 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12579486 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/579486
Light-emitting display device Oct 14, 2009 Issued
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