
Tucker J. Wright
Examiner (ID: 7690, Phone: (571)270-3234 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2896 |
| Total Applications | 1139 |
| Issued Applications | 862 |
| Pending Applications | 104 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4685712
[patent_doc_number] => 20080029893
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'Power and Ground Ring Layout'
[patent_app_type] => utility
[patent_app_number] => 11/780789
[patent_app_country] => US
[patent_app_date] => 2007-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4795
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20080029893.pdf
[firstpage_image] =>[orig_patent_app_number] => 11780789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/780789 | Power and Ground Ring Layout | Jul 19, 2007 | Abandoned |
Array
(
[id] => 5288082
[patent_doc_number] => 20090020812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-22
[patent_title] => 'METAL-OXIDE-SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/778628
[patent_app_country] => US
[patent_app_date] => 2007-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6362
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20090020812.pdf
[firstpage_image] =>[orig_patent_app_number] => 11778628
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/778628 | Metal-oxide-semiconductor device | Jul 15, 2007 | Issued |
Array
(
[id] => 303905
[patent_doc_number] => 07535045
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-19
[patent_title] => 'Checkerboard deep trench dynamic random access memory cell array layout'
[patent_app_type] => utility
[patent_app_number] => 11/776558
[patent_app_country] => US
[patent_app_date] => 2007-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2762
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/535/07535045.pdf
[firstpage_image] =>[orig_patent_app_number] => 11776558
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/776558 | Checkerboard deep trench dynamic random access memory cell array layout | Jul 11, 2007 | Issued |
Array
(
[id] => 9627134
[patent_doc_number] => 08796819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-05
[patent_title] => 'Non-volatile memory device including a variable resistance material'
[patent_app_type] => utility
[patent_app_number] => 11/822446
[patent_app_country] => US
[patent_app_date] => 2007-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3968
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11822446
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/822446 | Non-volatile memory device including a variable resistance material | Jul 5, 2007 | Issued |
Array
(
[id] => 4629802
[patent_doc_number] => 08008700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-30
[patent_title] => 'Non-volatile memory cell with embedded antifuse'
[patent_app_type] => utility
[patent_app_number] => 11/819618
[patent_app_country] => US
[patent_app_date] => 2007-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 10460
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/008/08008700.pdf
[firstpage_image] =>[orig_patent_app_number] => 11819618
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/819618 | Non-volatile memory cell with embedded antifuse | Jun 27, 2007 | Issued |
Array
(
[id] => 5539
[patent_doc_number] => 07812427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Soft switching semiconductor component with high robustness and low switching losses'
[patent_app_type] => utility
[patent_app_number] => 11/757451
[patent_app_country] => US
[patent_app_date] => 2007-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5422
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/812/07812427.pdf
[firstpage_image] =>[orig_patent_app_number] => 11757451
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/757451 | Soft switching semiconductor component with high robustness and low switching losses | Jun 3, 2007 | Issued |
Array
(
[id] => 264150
[patent_doc_number] => 07569917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-04
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/798989
[patent_app_country] => US
[patent_app_date] => 2007-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 17
[patent_no_of_words] => 5546
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/569/07569917.pdf
[firstpage_image] =>[orig_patent_app_number] => 11798989
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/798989 | Semiconductor device | May 17, 2007 | Issued |
Array
(
[id] => 326973
[patent_doc_number] => 07514747
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Silicon-on-insulator semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/798988
[patent_app_country] => US
[patent_app_date] => 2007-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 6070
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/514/07514747.pdf
[firstpage_image] =>[orig_patent_app_number] => 11798988
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/798988 | Silicon-on-insulator semiconductor device | May 17, 2007 | Issued |
Array
(
[id] => 4777352
[patent_doc_number] => 20080285350
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-20
[patent_title] => 'Circuit and method for a three dimensional non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 11/804608
[patent_app_country] => US
[patent_app_date] => 2007-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9247
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20080285350.pdf
[firstpage_image] =>[orig_patent_app_number] => 11804608
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/804608 | Circuit and method for a three dimensional non-volatile memory | May 17, 2007 | Abandoned |
Array
(
[id] => 4775923
[patent_doc_number] => 20080283921
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-20
[patent_title] => 'DUAL-GATE NMOS DEVICES WITH ANTIMONY SOURCE-DRAIN REGIONS AND METHODS FOR MANUFACTURING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/749078
[patent_app_country] => US
[patent_app_date] => 2007-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2941
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20080283921.pdf
[firstpage_image] =>[orig_patent_app_number] => 11749078
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/749078 | DUAL-GATE NMOS DEVICES WITH ANTIMONY SOURCE-DRAIN REGIONS AND METHODS FOR MANUFACTURING THEREOF | May 14, 2007 | Abandoned |
Array
(
[id] => 5043751
[patent_doc_number] => 20070262422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-15
[patent_title] => 'SHIELDING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/742198
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4942
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0262/20070262422.pdf
[firstpage_image] =>[orig_patent_app_number] => 11742198
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/742198 | Shielding device | Apr 29, 2007 | Issued |
Array
(
[id] => 5208185
[patent_doc_number] => 20070246769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING ADJACENT TWO INTERCONNECTION LINES HAVING DIFFERENT DISTANCES THEREBETWEEN'
[patent_app_type] => utility
[patent_app_number] => 11/739569
[patent_app_country] => US
[patent_app_date] => 2007-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3807
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20070246769.pdf
[firstpage_image] =>[orig_patent_app_number] => 11739569
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/739569 | SEMICONDUCTOR DEVICE INCLUDING ADJACENT TWO INTERCONNECTION LINES HAVING DIFFERENT DISTANCES THEREBETWEEN | Apr 23, 2007 | Abandoned |
Array
(
[id] => 4913108
[patent_doc_number] => 20080093707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'SEMICONDUCTOR DEVICE PROVIDED WITH FLOATING ELECTRODE'
[patent_app_type] => utility
[patent_app_number] => 11/738039
[patent_app_country] => US
[patent_app_date] => 2007-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7503
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0093/20080093707.pdf
[firstpage_image] =>[orig_patent_app_number] => 11738039
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/738039 | Semiconductor device provided with floating electrode | Apr 19, 2007 | Issued |
Array
(
[id] => 8676033
[patent_doc_number] => 08384149
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Memory cell having a shared programming gate'
[patent_app_type] => utility
[patent_app_number] => 11/785608
[patent_app_country] => US
[patent_app_date] => 2007-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3838
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 289
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11785608
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/785608 | Memory cell having a shared programming gate | Apr 18, 2007 | Issued |
Array
(
[id] => 4879841
[patent_doc_number] => 20080153224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 11/735229
[patent_app_country] => US
[patent_app_date] => 2007-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4820
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20080153224.pdf
[firstpage_image] =>[orig_patent_app_number] => 11735229
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/735229 | INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM | Apr 12, 2007 | Abandoned |
Array
(
[id] => 5163179
[patent_doc_number] => 20070284760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'Chip and flat panel display apparatus comprising the same'
[patent_app_type] => utility
[patent_app_number] => 11/784309
[patent_app_country] => US
[patent_app_date] => 2007-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6426
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0284/20070284760.pdf
[firstpage_image] =>[orig_patent_app_number] => 11784309
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/784309 | Chip and flat panel display apparatus comprising the same | Apr 5, 2007 | Abandoned |
Array
(
[id] => 9009923
[patent_doc_number] => 08525224
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-03
[patent_title] => 'III-nitride power semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/729742
[patent_app_country] => US
[patent_app_date] => 2007-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2369
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11729742
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/729742 | III-nitride power semiconductor device | Mar 28, 2007 | Issued |
Array
(
[id] => 4586751
[patent_doc_number] => 07851851
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-14
[patent_title] => 'Three dimensional NAND memory'
[patent_app_type] => utility
[patent_app_number] => 11/691939
[patent_app_country] => US
[patent_app_date] => 2007-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 47
[patent_no_of_words] => 8729
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/851/07851851.pdf
[firstpage_image] =>[orig_patent_app_number] => 11691939
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/691939 | Three dimensional NAND memory | Mar 26, 2007 | Issued |
Array
(
[id] => 8664909
[patent_doc_number] => 08378371
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-19
[patent_title] => 'Optoelectronic semiconductor chip'
[patent_app_type] => utility
[patent_app_number] => 12/298750
[patent_app_country] => US
[patent_app_date] => 2007-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 11611
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12298750
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/298750 | Optoelectronic semiconductor chip | Mar 25, 2007 | Issued |
Array
(
[id] => 270863
[patent_doc_number] => 07564099
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Monolithic MOSFET and Schottky diode device'
[patent_app_type] => utility
[patent_app_number] => 11/716839
[patent_app_country] => US
[patent_app_date] => 2007-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 1457
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/564/07564099.pdf
[firstpage_image] =>[orig_patent_app_number] => 11716839
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/716839 | Monolithic MOSFET and Schottky diode device | Mar 11, 2007 | Issued |