Search

Tung X. Nguyen

Examiner (ID: 14310, Phone: (571)272-1967 , Office: P/2868 )

Most Active Art Unit
2868
Art Unit(s)
2858, 2868, 2829
Total Applications
1778
Issued Applications
1568
Pending Applications
80
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18888973 [patent_doc_number] => 11867740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Method and apparatus for identifying a grid fault [patent_app_type] => utility [patent_app_number] => 17/299729 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8321 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17299729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/299729
Method and apparatus for identifying a grid fault Dec 18, 2019 Issued
Array ( [id] => 16356456 [patent_doc_number] => 10796974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Scan testable through silicon VIAs [patent_app_type] => utility [patent_app_number] => 16/710717 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 38 [patent_no_of_words] => 8603 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710717
Scan testable through silicon VIAs Dec 10, 2019 Issued
Array ( [id] => 16485432 [patent_doc_number] => 20200379035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => TEST BOARD HAVING SEMICONDUCTOR DEVICES MOUNTED AS DEVICES UNDER TEST AND TEST SYSTEM INCLUDING THE TEST BOARD [patent_app_type] => utility [patent_app_number] => 16/710549 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710549
Test board having semiconductor devices mounted as devices under test and test system including the test board Dec 10, 2019 Issued
Array ( [id] => 17364248 [patent_doc_number] => 11231266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-25 [patent_title] => Deformable signaling pathways [patent_app_type] => utility [patent_app_number] => 16/710607 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710607 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710607
Deformable signaling pathways Dec 10, 2019 Issued
Array ( [id] => 17076090 [patent_doc_number] => 11112482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Method for calibrating verticality of particle beam and system applied to semiconductor fabrication process [patent_app_type] => utility [patent_app_number] => 16/709890 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6143 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709890
Method for calibrating verticality of particle beam and system applied to semiconductor fabrication process Dec 9, 2019 Issued
Array ( [id] => 16016171 [patent_doc_number] => 20200182929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => INSPECTION APPARATUS AND INSPECTION METHOD [patent_app_type] => utility [patent_app_number] => 16/707385 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707385
Inspection apparatus and inspection method Dec 8, 2019 Issued
Array ( [id] => 18593420 [patent_doc_number] => 11742332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Methods and systems for matching both dynamic and static parameters in dies, discretes, and/or modules, and methods and systems based on the same [patent_app_type] => utility [patent_app_number] => 16/706028 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 16834 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706028 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706028
Methods and systems for matching both dynamic and static parameters in dies, discretes, and/or modules, and methods and systems based on the same Dec 5, 2019 Issued
Array ( [id] => 16254846 [patent_doc_number] => 20200264220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => ALTERNATIVE NEAR-FIELD GRADIENT PROBE FOR THE SUPPRESSION OF RADIO FREQUENCY INTERFERENCE [patent_app_type] => utility [patent_app_number] => 16/697127 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697127 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/697127
Alternative near-field gradient probe for the suppression of radio frequency interference Nov 25, 2019 Issued
Array ( [id] => 17387108 [patent_doc_number] => 20220034960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => MULTI-PROBER CHUCK ASSEMBLY AND CHANNEL [patent_app_type] => utility [patent_app_number] => 17/297657 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17297657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/297657
Multi-prober chuck assembly and channel Nov 24, 2019 Issued
Array ( [id] => 17164218 [patent_doc_number] => 11150310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Calibration of magnetic and optical sensors in a virtual reality or augmented reality display system [patent_app_type] => utility [patent_app_number] => 16/692969 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13531 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692969
Calibration of magnetic and optical sensors in a virtual reality or augmented reality display system Nov 21, 2019 Issued
Array ( [id] => 16772049 [patent_doc_number] => 10983149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Inrush current test device [patent_app_type] => utility [patent_app_number] => 16/690463 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8571 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690463
Inrush current test device Nov 20, 2019 Issued
Array ( [id] => 17120583 [patent_doc_number] => 11131710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Integrated photonic test circuit [patent_app_type] => utility [patent_app_number] => 16/691328 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7829 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691328 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691328
Integrated photonic test circuit Nov 20, 2019 Issued
Array ( [id] => 15559977 [patent_doc_number] => 20200064400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => WAFER INSPECTION SYSTEM, WAFER INSPECTION APPARATUS AND PROBER [patent_app_type] => utility [patent_app_number] => 16/671410 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671410
WAFER INSPECTION SYSTEM, WAFER INSPECTION APPARATUS AND PROBER Oct 31, 2019 Abandoned
Array ( [id] => 17252261 [patent_doc_number] => 11187745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Stabilizing a voltage at a device under test [patent_app_type] => utility [patent_app_number] => 16/669092 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4660 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16669092 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/669092
Stabilizing a voltage at a device under test Oct 29, 2019 Issued
Array ( [id] => 15834949 [patent_doc_number] => 20200132756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => GUIDE PLATE FOR PROBE CARD AND MANUFACTURING METHOD THEREOF, AND PROBE CARD HAVING SAME [patent_app_type] => utility [patent_app_number] => 16/666132 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666132
Guide plate for probe card and manufacturing method thereof, and probe card having same Oct 27, 2019 Issued
Array ( [id] => 17046038 [patent_doc_number] => 11099211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-24 [patent_title] => Cryogenic probe card [patent_app_type] => utility [patent_app_number] => 16/659535 [patent_app_country] => US [patent_app_date] => 2019-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5027 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/659535
Cryogenic probe card Oct 20, 2019 Issued
Array ( [id] => 17229943 [patent_doc_number] => 20210356500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => MEASURING DEVICE [patent_app_type] => utility [patent_app_number] => 17/286809 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17286809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/286809
Measuring device Oct 10, 2019 Issued
Array ( [id] => 18826121 [patent_doc_number] => 11841393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Cooling unit, objective lens module, semiconductor inspection device, and semiconductor inspection method [patent_app_type] => utility [patent_app_number] => 17/417190 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10378 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17417190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/417190
Cooling unit, objective lens module, semiconductor inspection device, and semiconductor inspection method Oct 8, 2019 Issued
Array ( [id] => 15771527 [patent_doc_number] => 20200116781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => INTEGRATED TESTING AND HANDLING MECHANISM [patent_app_type] => utility [patent_app_number] => 16/593771 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/593771
INTEGRATED TESTING AND HANDLING MECHANISM Oct 3, 2019 Abandoned
Array ( [id] => 16729023 [patent_doc_number] => 20210096170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => STRESS TEST ON CIRCUIT WITH LOW VOLTAGE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/587666 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16587666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/587666
Stress test on circuit with low voltage transistor Sep 29, 2019 Issued
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