Search

Tung X. Nguyen

Examiner (ID: 14310, Phone: (571)272-1967 , Office: P/2868 )

Most Active Art Unit
2868
Art Unit(s)
2858, 2868, 2829
Total Applications
1778
Issued Applications
1568
Pending Applications
80
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11980948 [patent_doc_number] => 20170285102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'IC TEST SITE VISION ALIGNMENT SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/472006 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8984 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472006 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472006
IC TEST SITE VISION ALIGNMENT SYSTEM Mar 27, 2017 Abandoned
Array ( [id] => 11745168 [patent_doc_number] => 20170199240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/471751 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4284 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471751 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471751
Semiconductor apparatus Mar 27, 2017 Issued
Array ( [id] => 14599557 [patent_doc_number] => 10352968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Current shunt [patent_app_type] => utility [patent_app_number] => 15/471214 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2116 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471214 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471214
Current shunt Mar 27, 2017 Issued
Array ( [id] => 11980929 [patent_doc_number] => 20170285083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'PROBE SYSTEMS, STORAGE MEDIA, AND METHODS FOR WAFER-LEVEL TESTING OVER EXTENDED TEMPERATURE RANGES' [patent_app_type] => utility [patent_app_number] => 15/471199 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11221 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471199 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471199
Probe systems, storage media, and methods for wafer-level testing over extended temperature ranges Mar 27, 2017 Issued
Array ( [id] => 13465289 [patent_doc_number] => 20180284187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => TESTING SYSTEM FOR LID-LESS INTEGRATED CIRCUIT PACKAGES [patent_app_type] => utility [patent_app_number] => 15/471390 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471390 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471390
Testing system for lid-less integrated circuit packages Mar 27, 2017 Issued
Array ( [id] => 11988678 [patent_doc_number] => 20170292832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'WAFER PROBING' [patent_app_type] => utility [patent_app_number] => 15/471565 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11877 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471565 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471565
Wafer probing Mar 27, 2017 Issued
Array ( [id] => 15135493 [patent_doc_number] => 10481207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Switching amplifier and method for estimating remaining lifetime of a switching amplifier [patent_app_type] => utility [patent_app_number] => 15/471555 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7240 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471555 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471555
Switching amplifier and method for estimating remaining lifetime of a switching amplifier Mar 27, 2017 Issued
Array ( [id] => 15424507 [patent_doc_number] => 10545175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Electrical measurement system and method for establishing a desired total offset [patent_app_type] => utility [patent_app_number] => 15/470625 [patent_app_country] => US [patent_app_date] => 2017-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3291 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15470625 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/470625
Electrical measurement system and method for establishing a desired total offset Mar 26, 2017 Issued
Array ( [id] => 12179971 [patent_doc_number] => 20180038907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'METHOD FOR ESTIMATING AN OPERATING PROFILE OF AN INTEGRATED CIRCUIT OF A SYSTEM-ON-A-CHIP, AND CORRESPONDING SYSTEM-ON-A-CHIP' [patent_app_type] => utility [patent_app_number] => 15/468798 [patent_app_country] => US [patent_app_date] => 2017-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3553 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15468798 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/468798
Method for estimating an operating profile of an integrated circuit of a system-on-a-chip, and corresponding system-on-a-chip Mar 23, 2017 Issued
Array ( [id] => 15699421 [patent_doc_number] => 10605881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Magnetic resonance imaging apparatus and image processing method [patent_app_type] => utility [patent_app_number] => 16/088912 [patent_app_country] => US [patent_app_date] => 2017-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13017 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16088912 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/088912
Magnetic resonance imaging apparatus and image processing method Mar 16, 2017 Issued
Array ( [id] => 11840013 [patent_doc_number] => 20170221733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'WAFER CASSETTE' [patent_app_type] => utility [patent_app_number] => 15/414873 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3831 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414873 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414873
Wafer cassette Jan 24, 2017 Issued
Array ( [id] => 13795907 [patent_doc_number] => 20190011492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => CIRCUIT AND METHOD FOR DETECTING ARC FAULTS [patent_app_type] => utility [patent_app_number] => 16/066066 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16066066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/066066
Circuit and method for detecting arc faults Jan 19, 2017 Issued
Array ( [id] => 11650732 [patent_doc_number] => 20170146634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'METHOD OF CALIBRATING AND DEBUGGING TESTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/401987 [patent_app_country] => US [patent_app_date] => 2017-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4988 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15401987 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/401987
Method of calibrating and debugging testing system Jan 8, 2017 Issued
Array ( [id] => 11708000 [patent_doc_number] => 20170176499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'CALIBRATION FOR TEST AND MEASUREMENT INSTRUMENT INCLUDING ASYNCHRONOUS TIME-INTERLEAVED DIGITIZER USING HARMONIC MIXING' [patent_app_type] => utility [patent_app_number] => 15/391637 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10159 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391637 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391637
Calibration for test and measurement instrument including asynchronous time-interleaved digitizer using harmonic mixing Dec 26, 2016 Issued
Array ( [id] => 12038810 [patent_doc_number] => 09817038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Electro-optic current sensor with high dynamic range and accuracy' [patent_app_type] => utility [patent_app_number] => 15/389752 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 16836 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389752 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389752
Electro-optic current sensor with high dynamic range and accuracy Dec 22, 2016 Issued
Array ( [id] => 11557684 [patent_doc_number] => 20170103931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'SCAN TESTABLE THROUGH SILICON VIAs' [patent_app_type] => utility [patent_app_number] => 15/386970 [patent_app_country] => US [patent_app_date] => 2016-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8635 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15386970 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/386970
Through silicon via, scan cell stimulus, response to two switches Dec 20, 2016 Issued
Array ( [id] => 16199941 [patent_doc_number] => 10725097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Platform component interconnect testing [patent_app_type] => utility [patent_app_number] => 15/385500 [patent_app_country] => US [patent_app_date] => 2016-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15385500 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/385500
Platform component interconnect testing Dec 19, 2016 Issued
Array ( [id] => 11711364 [patent_doc_number] => 20170179863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'ARRANGEMENT AND METHOD FOR MONITORING A PSM-MACHINE' [patent_app_type] => utility [patent_app_number] => 15/381268 [patent_app_country] => US [patent_app_date] => 2016-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15381268 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/381268
Arrangement and method for monitoring a PSM-machine Dec 15, 2016 Issued
Array ( [id] => 11707993 [patent_doc_number] => 20170176493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'TEST SOCKET AND METHOD FOR TESTING A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/381435 [patent_app_country] => US [patent_app_date] => 2016-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15381435 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/381435
Test socket and method for testing a semiconductor package Dec 15, 2016 Issued
Array ( [id] => 11707999 [patent_doc_number] => 20170176498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'POWER SUPPLY' [patent_app_type] => utility [patent_app_number] => 15/381296 [patent_app_country] => US [patent_app_date] => 2016-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5992 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15381296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/381296
Power supply Dec 15, 2016 Issued
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