Tyrone V. Walker

Array ( [id] => 3997120 [patent_doc_number] => 05892179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Solder bumps and structures for integrated redistribution routing conductors' [patent_app_type] => 1 [patent_app_number] => 8/977258 [patent_app_country] => US [patent_app_date] => 1997-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892179.pdf [firstpage_image] =>[orig_patent_app_number] => 977258 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4001408 [patent_doc_number] => 05986217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Printed circuit board for mitigating thermally-induced mechanical damage of solder joints connecting electronic components' [patent_app_type] => 1 [patent_app_number] => 8/956166 [patent_app_country] => US [patent_app_date] => 1997-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4838 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986217.pdf [firstpage_image] =>[orig_patent_app_number] => 956166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3979617 [patent_doc_number] => 05917157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Multilayer wiring board laminate with enhanced thermal dissipation to dielectric substrate laminate' [patent_app_type] => 1 [patent_app_number] => 8/939946 [patent_app_country] => US [patent_app_date] => 1997-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 10859 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917157.pdf [firstpage_image] =>[orig_patent_app_number] => 939946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4048519 [patent_doc_number] => 05909010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Chip size package' [patent_app_type] => 1 [patent_app_number] => 8/912337 [patent_app_country] => US [patent_app_date] => 1997-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 2121 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909010.pdf [firstpage_image] =>[orig_patent_app_number] => 912337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4079196 [patent_doc_number] => 05965848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Disposable portable electronic devices and method of making' [patent_app_type] => 1 [patent_app_number] => 8/898295 [patent_app_country] => US [patent_app_date] => 1997-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4060 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/965/05965848.pdf [firstpage_image] =>[orig_patent_app_number] => 898295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3989848 [patent_doc_number] => 05910641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Selectively filled adhesives for compliant, reworkable, and solder-free flip chip interconnection and encapsulation' [patent_app_type] => 1 [patent_app_number] => 8/895537 [patent_app_country] => US [patent_app_date] => 1997-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2471 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/910/05910641.pdf [firstpage_image] =>[orig_patent_app_number] => 895537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3945518 [patent_doc_number] => 05981873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Printed circuit board for ball grid array semiconductor package' [patent_app_type] => 1 [patent_app_number] => 8/882248 [patent_app_country] => US [patent_app_date] => 1997-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3332 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/981/05981873.pdf [firstpage_image] =>[orig_patent_app_number] => 882248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4140020 [patent_doc_number] => 06015955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Reworkability solution for wirebound chips using high performance capacitor' [patent_app_type] => 1 [patent_app_number] => 8/879718 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2767 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015955.pdf [firstpage_image] =>[orig_patent_app_number] => 879718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3942685 [patent_doc_number] => 05973262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Multi-tap distribution apparatus' [patent_app_type] => 1 [patent_app_number] => 8/849698 [patent_app_country] => US [patent_app_date] => 1997-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4570 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973262.pdf [firstpage_image] =>[orig_patent_app_number] => 849698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3989887 [patent_doc_number] => 05910644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Universal surface finish for DCA, SMT and pad on pad interconnections' [patent_app_type] => 1 [patent_app_number] => 8/873060 [patent_app_country] => US [patent_app_date] => 1997-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3632 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/910/05910644.pdf [firstpage_image] =>[orig_patent_app_number] => 873060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3998128 [patent_doc_number] => 05920037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Conductive bonding design for metal backed circuits' [patent_app_type] => 1 [patent_app_number] => 8/855812 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3654 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920037.pdf [firstpage_image] =>[orig_patent_app_number] => 855812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4052903 [patent_doc_number] => 05869787 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Electrically conductive projections' [patent_app_type] => 1 [patent_app_number] => 8/846683 [patent_app_country] => US [patent_app_date] => 1997-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3233 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869787.pdf [firstpage_image] =>[orig_patent_app_number] => 846683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4048410 [patent_doc_number] => 05912438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-15 [patent_title] => 'Assembly of electronic components onto substrates' [patent_app_type] => 1 [patent_app_number] => 8/762639 [patent_app_country] => US [patent_app_date] => 1996-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3121 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/912/05912438.pdf [firstpage_image] =>[orig_patent_app_number] => 762639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3983682 [patent_doc_number] => 05949029 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Conductive elastomers and methods for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/736830 [patent_app_country] => US [patent_app_date] => 1996-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4499 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949029.pdf [firstpage_image] =>[orig_patent_app_number] => 736830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4048505 [patent_doc_number] => 05909009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Laminate organic resin wiring board and method of producing the same' [patent_app_type] => 1 [patent_app_number] => 8/662005 [patent_app_country] => US [patent_app_date] => 1996-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 2950 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909009.pdf [firstpage_image] =>[orig_patent_app_number] => 662005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4029473 [patent_doc_number] => 05883335 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Electrical connection substrate having a through hole for connecting a chip to an opposite surface of the substrate' [patent_app_type] => 1 [patent_app_number] => 8/616118 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3478 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883335.pdf [firstpage_image] =>[orig_patent_app_number] => 616118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4050830 [patent_doc_number] => 05943598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Integrated circuit with planarized dielectric layer between successive polysilicon layers' [patent_app_type] => 1 [patent_app_number] => 8/545388 [patent_app_country] => US [patent_app_date] => 1995-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3355 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943598.pdf [firstpage_image] =>[orig_patent_app_number] => 545388 [rel_patent_id] =>[rel_patent_doc_number] =>)