Search

Uyen Tran Smet

Examiner (ID: 10372, Phone: (571)272-2267 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
744
Issued Applications
657
Pending Applications
59
Abandoned Applications
42

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18857029 [patent_doc_number] => 11854620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Word line zoned adaptive initial program voltage for non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/351533 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 14115 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351533 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351533
Word line zoned adaptive initial program voltage for non-volatile memory Jun 17, 2021 Issued
Array ( [id] => 18401922 [patent_doc_number] => 11664066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Information processing apparatus, information processing system, and semiconductor storage device [patent_app_type] => utility [patent_app_number] => 17/348082 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 46 [patent_no_of_words] => 29244 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348082 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348082
Information processing apparatus, information processing system, and semiconductor storage device Jun 14, 2021 Issued
Array ( [id] => 17130060 [patent_doc_number] => 20210304829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => MEMORIES FOR DETERMINING DATA STATES OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/344141 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344141
Memories for determining data states of memory cells Jun 9, 2021 Issued
Array ( [id] => 18415831 [patent_doc_number] => 11670376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Erasing partially-programmed memory unit [patent_app_type] => utility [patent_app_number] => 17/340688 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340688 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340688
Erasing partially-programmed memory unit Jun 6, 2021 Issued
Array ( [id] => 19873529 [patent_doc_number] => 12266398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Semiconductor device and dynamic logic circuit [patent_app_type] => utility [patent_app_number] => 17/337552 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 30 [patent_no_of_words] => 14886 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337552
Semiconductor device and dynamic logic circuit Jun 2, 2021 Issued
Array ( [id] => 18857020 [patent_doc_number] => 11854611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Aggressive quick-pass multiphase programming for voltage distribution state separation in non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/326417 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 21858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326417
Aggressive quick-pass multiphase programming for voltage distribution state separation in non-volatile memory May 20, 2021 Issued
Array ( [id] => 18520624 [patent_doc_number] => 11710518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Sense amplifier having offset cancellation [patent_app_type] => utility [patent_app_number] => 17/321769 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 12723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321769 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/321769
Sense amplifier having offset cancellation May 16, 2021 Issued
Array ( [id] => 18131123 [patent_doc_number] => 11557338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Non-volatile memory with multi-level cell array and associated program control method [patent_app_type] => utility [patent_app_number] => 17/319127 [patent_app_country] => US [patent_app_date] => 2021-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 11991 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17319127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/319127
Non-volatile memory with multi-level cell array and associated program control method May 12, 2021 Issued
Array ( [id] => 17070413 [patent_doc_number] => 20210272630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => ARCHITECTURE FOR FAST CONTENT ADDRESSABLE MEMORY SEARCH [patent_app_type] => utility [patent_app_number] => 17/318826 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318826 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318826
Architecture for fast content addressable memory search May 11, 2021 Issued
Array ( [id] => 17055551 [patent_doc_number] => 20210264985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => METHODS OF OPERATING NONVOLATILE MEMORY DEVICES, METHODS OF OPERATING STORAGE DEVICE AND STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 17/316463 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316463 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316463
Methods of operating nonvolatile memory devices, methods of operating storage device and storage devices May 9, 2021 Issued
Array ( [id] => 18387090 [patent_doc_number] => 11657879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Semiconductor memory [patent_app_type] => utility [patent_app_number] => 17/244246 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 188 [patent_figures_cnt] => 193 [patent_no_of_words] => 119687 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244246 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244246
Semiconductor memory Apr 28, 2021 Issued
Array ( [id] => 17917160 [patent_doc_number] => 20220319556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => RAPID POWER REDUCTION FOR NON-VOLATILE MEMORY EXPRESS STORAGE [patent_app_type] => utility [patent_app_number] => 17/244215 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244215
RAPID POWER REDUCTION FOR NON-VOLATILE MEMORY EXPRESS STORAGE Apr 28, 2021 Abandoned
Array ( [id] => 17606902 [patent_doc_number] => 11335394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Temperature informed memory refresh [patent_app_type] => utility [patent_app_number] => 17/238846 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238846
Temperature informed memory refresh Apr 22, 2021 Issued
Array ( [id] => 18856017 [patent_doc_number] => 11853600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory systems, modules, and methods for improved capacity [patent_app_type] => utility [patent_app_number] => 17/235629 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 5499 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17235629 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/235629
Memory systems, modules, and methods for improved capacity Apr 19, 2021 Issued
Array ( [id] => 18839265 [patent_doc_number] => 11847339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Apparatus for outputting internal state of memory apparatus and memory system using the apparatus [patent_app_type] => utility [patent_app_number] => 17/231734 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 11450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231734
Apparatus for outputting internal state of memory apparatus and memory system using the apparatus Apr 14, 2021 Issued
Array ( [id] => 17165932 [patent_doc_number] => 11152040 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-19 [patent_title] => Delay calibration oscillators for a memory device [patent_app_type] => utility [patent_app_number] => 17/231715 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 15944 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231715
Delay calibration oscillators for a memory device Apr 14, 2021 Issued
Array ( [id] => 17536453 [patent_doc_number] => 20220115062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/227907 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227907
Semiconductor memory device and method of operating the same Apr 11, 2021 Issued
Array ( [id] => 16965978 [patent_doc_number] => 20210217477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 17/220107 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220107 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220107
Nonvolatile memory device and program method of the same Mar 31, 2021 Issued
Array ( [id] => 18578715 [patent_doc_number] => 11735254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Error avoidance based on voltage distribution parameters of blocks [patent_app_type] => utility [patent_app_number] => 17/217772 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217772 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/217772
Error avoidance based on voltage distribution parameters of blocks Mar 29, 2021 Issued
Array ( [id] => 17900958 [patent_doc_number] => 20220310620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MEMORY DEVICE INCLUDING CALIBRATION OPERATION AND TRANSISTOR HAVING ADJUSTABLE THRESHOLD VOLTAGE [patent_app_type] => utility [patent_app_number] => 17/215904 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215904
Memory device including calibration operation and transistor having adjustable threshold voltage Mar 28, 2021 Issued
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