
Valerie N. Newton
Examiner (ID: 2467, Phone: (571)270-5015 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2829, 2823, 4122 |
| Total Applications | 1018 |
| Issued Applications | 802 |
| Pending Applications | 97 |
| Abandoned Applications | 153 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17716844
[patent_doc_number] => 11380845
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Semiconducting microfibers and methods of making the same
[patent_app_type] => utility
[patent_app_number] => 16/177207
[patent_app_country] => US
[patent_app_date] => 2018-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 36
[patent_no_of_words] => 7057
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16177207
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/177207 | Semiconducting microfibers and methods of making the same | Oct 30, 2018 | Issued |
Array
(
[id] => 16417832
[patent_doc_number] => 10825733
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-03
[patent_title] => Reusable wide bandgap semiconductor substrate
[patent_app_type] => utility
[patent_app_number] => 16/170622
[patent_app_country] => US
[patent_app_date] => 2018-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4302
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170622
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/170622 | Reusable wide bandgap semiconductor substrate | Oct 24, 2018 | Issued |
Array
(
[id] => 15687991
[patent_doc_number] => 20200098659
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-26
[patent_title] => HIGH RESISTIVITY WAFER WITH HEAT DISSIPATION STRUCTURE AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/170067
[patent_app_country] => US
[patent_app_date] => 2018-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4068
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170067
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/170067 | High resistivity wafer with heat dissipation structure and method of making the same | Oct 24, 2018 | Issued |
Array
(
[id] => 14738989
[patent_doc_number] => 10388908
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-20
[patent_title] => Display panel and display apparatus having the same
[patent_app_type] => utility
[patent_app_number] => 16/161358
[patent_app_country] => US
[patent_app_date] => 2018-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4341
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161358
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/161358 | Display panel and display apparatus having the same | Oct 15, 2018 | Issued |
Array
(
[id] => 16272485
[patent_doc_number] => 20200273973
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR HAVING A BORON NITRIDE ALLOY INTERLAYER AND METHOD OF PRODUCTION
[patent_app_type] => utility
[patent_app_number] => 16/754521
[patent_app_country] => US
[patent_app_date] => 2018-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3943
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16754521
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/754521 | High electron mobility transistor having a boron nitride alloy interlayer and method of production | Oct 14, 2018 | Issued |
Array
(
[id] => 15316023
[patent_doc_number] => 10522729
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-31
[patent_title] => Light emitting device
[patent_app_type] => utility
[patent_app_number] => 16/157997
[patent_app_country] => US
[patent_app_date] => 2018-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 45
[patent_no_of_words] => 17421
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16157997
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/157997 | Light emitting device | Oct 10, 2018 | Issued |
Array
(
[id] => 16372423
[patent_doc_number] => 10804189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-13
[patent_title] => Power device package structure
[patent_app_type] => utility
[patent_app_number] => 16/153831
[patent_app_country] => US
[patent_app_date] => 2018-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4023
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153831
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/153831 | Power device package structure | Oct 7, 2018 | Issued |
Array
(
[id] => 13963135
[patent_doc_number] => 20190057912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-21
[patent_title] => Interposer Test Structures and Methods
[patent_app_type] => utility
[patent_app_number] => 16/148169
[patent_app_country] => US
[patent_app_date] => 2018-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13550
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148169
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/148169 | Interposer test structures and methods | Sep 30, 2018 | Issued |
Array
(
[id] => 14110965
[patent_doc_number] => 20190097158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-28
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/143685
[patent_app_country] => US
[patent_app_date] => 2018-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4276
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16143685
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/143685 | Display device | Sep 26, 2018 | Issued |
Array
(
[id] => 13832927
[patent_doc_number] => 20190019948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-17
[patent_title] => METHOD AND APPARATUS PROVIDING MULTI-PLANED ARRAY MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/125235
[patent_app_country] => US
[patent_app_date] => 2018-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7233
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125235
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/125235 | Method and apparatus providing multi-planed array memory device | Sep 6, 2018 | Issued |
Array
(
[id] => 16308871
[patent_doc_number] => 10777682
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-15
[patent_title] => Semiconductor device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/121700
[patent_app_country] => US
[patent_app_date] => 2018-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 32
[patent_no_of_words] => 19864
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121700
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/121700 | Semiconductor device and manufacturing method thereof | Sep 4, 2018 | Issued |
Array
(
[id] => 15955079
[patent_doc_number] => 10665453
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/110396
[patent_app_country] => US
[patent_app_date] => 2018-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 78
[patent_no_of_words] => 33482
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110396
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/110396 | Semiconductor device and method for manufacturing the same | Aug 22, 2018 | Issued |
Array
(
[id] => 15955079
[patent_doc_number] => 10665453
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/110396
[patent_app_country] => US
[patent_app_date] => 2018-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 78
[patent_no_of_words] => 33482
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110396
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/110396 | Semiconductor device and method for manufacturing the same | Aug 22, 2018 | Issued |
Array
(
[id] => 15955079
[patent_doc_number] => 10665453
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/110396
[patent_app_country] => US
[patent_app_date] => 2018-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 78
[patent_no_of_words] => 33482
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110396
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/110396 | Semiconductor device and method for manufacturing the same | Aug 22, 2018 | Issued |
Array
(
[id] => 15955079
[patent_doc_number] => 10665453
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/110396
[patent_app_country] => US
[patent_app_date] => 2018-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 78
[patent_no_of_words] => 33482
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110396
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/110396 | Semiconductor device and method for manufacturing the same | Aug 22, 2018 | Issued |
Array
(
[id] => 13613753
[patent_doc_number] => 20180358426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-13
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/106265
[patent_app_country] => US
[patent_app_date] => 2018-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6062
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16106265
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/106265 | Display device | Aug 20, 2018 | Issued |
Array
(
[id] => 16684364
[patent_doc_number] => 10943855
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-09
[patent_title] => Electronic device packaging with galvanic isolation
[patent_app_type] => utility
[patent_app_number] => 16/102922
[patent_app_country] => US
[patent_app_date] => 2018-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 8402
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102922
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/102922 | Electronic device packaging with galvanic isolation | Aug 13, 2018 | Issued |
Array
(
[id] => 15532583
[patent_doc_number] => 20200058597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-20
[patent_title] => SIGNAL CONDUCTOR ROUTING CONFIGURATIONS AND TECHNIQUES
[patent_app_type] => utility
[patent_app_number] => 16/102984
[patent_app_country] => US
[patent_app_date] => 2018-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7366
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102984
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/102984 | Signal conductor routing configurations and techniques | Aug 13, 2018 | Issued |
Array
(
[id] => 16536829
[patent_doc_number] => 10879446
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-29
[patent_title] => Vertical flux bias lines coupled to vertical squid loops in superconducting qubits
[patent_app_type] => utility
[patent_app_number] => 16/102780
[patent_app_country] => US
[patent_app_date] => 2018-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 20145
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102780
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/102780 | Vertical flux bias lines coupled to vertical squid loops in superconducting qubits | Aug 13, 2018 | Issued |
Array
(
[id] => 16356560
[patent_doc_number] => 10797078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-06
[patent_title] => Hybrid fin field-effect transistor cell structures and related methods
[patent_app_type] => utility
[patent_app_number] => 16/102803
[patent_app_country] => US
[patent_app_date] => 2018-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 17
[patent_no_of_words] => 5273
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102803
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/102803 | Hybrid fin field-effect transistor cell structures and related methods | Aug 13, 2018 | Issued |