
Valerie N. Newton
Examiner (ID: 2467, Phone: (571)270-5015 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2829, 2823, 4122 |
| Total Applications | 1018 |
| Issued Applications | 802 |
| Pending Applications | 97 |
| Abandoned Applications | 153 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14950803
[patent_doc_number] => 10436662
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-08
[patent_title] => High temperature protected wire bonded sensors
[patent_app_type] => utility
[patent_app_number] => 15/667117
[patent_app_country] => US
[patent_app_date] => 2017-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8167
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667117
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/667117 | High temperature protected wire bonded sensors | Aug 1, 2017 | Issued |
Array
(
[id] => 13528575
[patent_doc_number] => 20180315830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-01
[patent_title] => FinFETs and Methods of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 15/667491
[patent_app_country] => US
[patent_app_date] => 2017-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667491
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/667491 | FinFETs and methods of forming the same | Aug 1, 2017 | Issued |
Array
(
[id] => 13921719
[patent_doc_number] => 10204984
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-02-12
[patent_title] => Methods, apparatus and system for forming increased surface regions within EPI structures for improved trench silicide
[patent_app_type] => utility
[patent_app_number] => 15/667376
[patent_app_country] => US
[patent_app_date] => 2017-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 7194
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667376
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/667376 | Methods, apparatus and system for forming increased surface regions within EPI structures for improved trench silicide | Aug 1, 2017 | Issued |
Array
(
[id] => 13862521
[patent_doc_number] => 10192988
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => Flat STI surface for gate oxide uniformity in Fin FET devices
[patent_app_type] => utility
[patent_app_number] => 15/660355
[patent_app_country] => US
[patent_app_date] => 2017-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 7158
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660355
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/660355 | Flat STI surface for gate oxide uniformity in Fin FET devices | Jul 25, 2017 | Issued |
Array
(
[id] => 12005575
[patent_doc_number] => 20170309730
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'Apparatus and Method for FinFETs'
[patent_app_type] => utility
[patent_app_number] => 15/647820
[patent_app_country] => US
[patent_app_date] => 2017-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3938
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15647820
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/647820 | Apparatus and method for FinFETs | Jul 11, 2017 | Issued |
Array
(
[id] => 15061935
[patent_doc_number] => 10461280
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-29
[patent_title] => Double-sided electroluminescent display panel and display device
[patent_app_type] => utility
[patent_app_number] => 15/736551
[patent_app_country] => US
[patent_app_date] => 2017-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 9873
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15736551
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/736551 | Double-sided electroluminescent display panel and display device | Jun 27, 2017 | Issued |
Array
(
[id] => 13073439
[patent_doc_number] => 10057519
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-21
[patent_title] => Solid-state imaging device and imaging system
[patent_app_type] => utility
[patent_app_number] => 15/622809
[patent_app_country] => US
[patent_app_date] => 2017-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 11137
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15622809
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/622809 | Solid-state imaging device and imaging system | Jun 13, 2017 | Issued |
Array
(
[id] => 13741169
[patent_doc_number] => 20180375054
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-27
[patent_title] => FLEXIBLE DISPLAY SCREEN AND DISPLAY APPARATUS COMPRISING THIS FLEXIBLE DISPLAY SCREEN
[patent_app_type] => utility
[patent_app_number] => 15/579768
[patent_app_country] => US
[patent_app_date] => 2017-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2195
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15579768
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/579768 | FLEXIBLE DISPLAY SCREEN AND DISPLAY APPARATUS COMPRISING THIS FLEXIBLE DISPLAY SCREEN | Jun 7, 2017 | Abandoned |
Array
(
[id] => 13271175
[patent_doc_number] => 10147674
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-04
[patent_title] => Semiconductor package assembly
[patent_app_type] => utility
[patent_app_number] => 15/613333
[patent_app_country] => US
[patent_app_date] => 2017-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4851
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613333
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/613333 | Semiconductor package assembly | Jun 4, 2017 | Issued |
Array
(
[id] => 13174301
[patent_doc_number] => 10103275
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-16
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/609513
[patent_app_country] => US
[patent_app_date] => 2017-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 34
[patent_no_of_words] => 20832
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609513
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/609513 | Semiconductor device | May 30, 2017 | Issued |
Array
(
[id] => 13613743
[patent_doc_number] => 20180358421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-13
[patent_title] => AMOLED DISPLAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/736774
[patent_app_country] => US
[patent_app_date] => 2017-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3929
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15736774
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/736774 | AMOLED display substrate, method for fabricating the same and display device | May 25, 2017 | Issued |
Array
(
[id] => 15139553
[patent_doc_number] => 10483263
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-19
[patent_title] => Semiconductor device and manufacturing method therefor
[patent_app_type] => utility
[patent_app_number] => 15/603754
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 7304
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 346
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603754
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603754 | Semiconductor device and manufacturing method therefor | May 23, 2017 | Issued |
Array
(
[id] => 15625473
[patent_doc_number] => 20200083141
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 16/481364
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2192
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16481364
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/481364 | Semiconductor package | May 23, 2017 | Issued |
Array
(
[id] => 12498972
[patent_doc_number] => 09997619
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-06-12
[patent_title] => Bipolar junction transistors and methods forming same
[patent_app_type] => utility
[patent_app_number] => 15/603611
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 55
[patent_no_of_words] => 3673
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603611
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603611 | Bipolar junction transistors and methods forming same | May 23, 2017 | Issued |
Array
(
[id] => 13019093
[patent_doc_number] => 10032663
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-07-24
[patent_title] => Anneal after trench sidewall implant to reduce defects
[patent_app_type] => utility
[patent_app_number] => 15/603856
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 4390
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603856
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603856 | Anneal after trench sidewall implant to reduce defects | May 23, 2017 | Issued |
Array
(
[id] => 12083162
[patent_doc_number] => 20170345749
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => 'POWER COMMUTATION MODULE'
[patent_app_type] => utility
[patent_app_number] => 15/603921
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2998
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603921
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603921 | Power commutation module | May 23, 2017 | Issued |
Array
(
[id] => 14616983
[patent_doc_number] => 10361198
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-23
[patent_title] => Integrated circuit devices and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/603577
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10338
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603577
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603577 | Integrated circuit devices and method of manufacturing the same | May 23, 2017 | Issued |
Array
(
[id] => 12154671
[patent_doc_number] => 20180025935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'SEMICONDUCTOR STRUCTURE HAVING AN ISOLATION LAYER FOR REDUCING PARASITIC EFFECT'
[patent_app_type] => utility
[patent_app_number] => 15/603480
[patent_app_country] => US
[patent_app_date] => 2017-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4062
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15603480
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/603480 | Semiconductor structure having an isolation layer for reducing parasitic effect | May 23, 2017 | Issued |
Array
(
[id] => 14191485
[patent_doc_number] => 20190115448
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-18
[patent_title] => III-NITRIDE VERTICAL TRANSISTOR WITH APERTURE REGION FORMED USING ION IMPLANTATION
[patent_app_type] => utility
[patent_app_number] => 16/092154
[patent_app_country] => US
[patent_app_date] => 2017-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16092154
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/092154 | III-NITRIDE VERTICAL TRANSISTOR WITH APERTURE REGION FORMED USING ION IMPLANTATION | May 10, 2017 | Abandoned |
Array
(
[id] => 11869696
[patent_doc_number] => 20170236981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/584150
[patent_app_country] => US
[patent_app_date] => 2017-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 17776
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584150
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/584150 | Light emitting device | May 1, 2017 | Issued |