
Valerie N. Newton
Examiner (ID: 2467, Phone: (571)270-5015 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2829, 2823, 4122 |
| Total Applications | 1018 |
| Issued Applications | 802 |
| Pending Applications | 97 |
| Abandoned Applications | 153 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8363611
[patent_doc_number] => 08252675
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Methods of forming CMOS transistors with high conductivity gate electrodes'
[patent_app_type] => utility
[patent_app_number] => 12/942763
[patent_app_country] => US
[patent_app_date] => 2010-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 37
[patent_no_of_words] => 6599
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12942763
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/942763 | Methods of forming CMOS transistors with high conductivity gate electrodes | Nov 8, 2010 | Issued |
Array
(
[id] => 9074915
[patent_doc_number] => 08552495
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-08
[patent_title] => 'Dummy gate for a high voltage transistor device'
[patent_app_type] => utility
[patent_app_number] => 12/910000
[patent_app_country] => US
[patent_app_date] => 2010-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4382
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12910000
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/910000 | Dummy gate for a high voltage transistor device | Oct 21, 2010 | Issued |
Array
(
[id] => 9140871
[patent_doc_number] => 08581334
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Via structures and semiconductor devices having the via structures'
[patent_app_type] => utility
[patent_app_number] => 12/910019
[patent_app_country] => US
[patent_app_date] => 2010-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 8267
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12910019
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/910019 | Via structures and semiconductor devices having the via structures | Oct 21, 2010 | Issued |
Array
(
[id] => 5940799
[patent_doc_number] => 20110101419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND OPTICAL APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/909136
[patent_app_country] => US
[patent_app_date] => 2010-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 23065
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20110101419.pdf
[firstpage_image] =>[orig_patent_app_number] => 12909136
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/909136 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND OPTICAL APPARATUS | Oct 20, 2010 | Abandoned |
Array
(
[id] => 5980259
[patent_doc_number] => 20110095397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-28
[patent_title] => 'Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures'
[patent_app_type] => utility
[patent_app_number] => 12/909289
[patent_app_country] => US
[patent_app_date] => 2010-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8096
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0095/20110095397.pdf
[firstpage_image] =>[orig_patent_app_number] => 12909289
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/909289 | Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures | Oct 20, 2010 | Abandoned |
Array
(
[id] => 8154814
[patent_doc_number] => 20120098088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-26
[patent_title] => 'METHOD OF FORMING ISOLATION STRUCTURE AND SEMICONDUCTOR DEVICE WITH THE ISOLATION STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/909207
[patent_app_country] => US
[patent_app_date] => 2010-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2476
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20120098088.pdf
[firstpage_image] =>[orig_patent_app_number] => 12909207
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/909207 | METHOD OF FORMING ISOLATION STRUCTURE AND SEMICONDUCTOR DEVICE WITH THE ISOLATION STRUCTURE | Oct 20, 2010 | Abandoned |
Array
(
[id] => 8578262
[patent_doc_number] => 08344473
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-01
[patent_title] => 'Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 12/906521
[patent_app_country] => US
[patent_app_date] => 2010-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 42
[patent_no_of_words] => 5086
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12906521
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/906521 | Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device | Oct 17, 2010 | Issued |
Array
(
[id] => 6036345
[patent_doc_number] => 20110089431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-21
[patent_title] => 'COMPOUND SINGLE CRYSTAL AND METHOD FOR PRODUCING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/905355
[patent_app_country] => US
[patent_app_date] => 2010-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10068
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20110089431.pdf
[firstpage_image] =>[orig_patent_app_number] => 12905355
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/905355 | COMPOUND SINGLE CRYSTAL AND METHOD FOR PRODUCING THE SAME | Oct 14, 2010 | Abandoned |
Array
(
[id] => 6120857
[patent_doc_number] => 20110084370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'SEMICONDUCTOR PACKAGE AND PROCESS FOR FABRICATING SAME'
[patent_app_type] => utility
[patent_app_number] => 12/904799
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 8639
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20110084370.pdf
[firstpage_image] =>[orig_patent_app_number] => 12904799
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904799 | Semiconductor package and process for fabricating same | Oct 13, 2010 | Issued |
Array
(
[id] => 6036278
[patent_doc_number] => 20110089414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-21
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/904565
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 19940
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20110089414.pdf
[firstpage_image] =>[orig_patent_app_number] => 12904565
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904565 | Semiconductor device and manufacturing method thereof | Oct 13, 2010 | Issued |
Array
(
[id] => 9140790
[patent_doc_number] => 08581253
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Display substrate and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/904507
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 24
[patent_no_of_words] => 11255
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904507
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904507 | Display substrate and method of manufacturing the same | Oct 13, 2010 | Issued |
Array
(
[id] => 5940711
[patent_doc_number] => 20110101331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-05
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/904579
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 21419
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20110101331.pdf
[firstpage_image] =>[orig_patent_app_number] => 12904579
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904579 | Semiconductor device | Oct 13, 2010 | Issued |
Array
(
[id] => 8933197
[patent_doc_number] => 08492899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-23
[patent_title] => 'Method to electrodeposit nickel on silicon for forming controllable nickel silicide'
[patent_app_type] => utility
[patent_app_number] => 12/904597
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4855
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904597
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904597 | Method to electrodeposit nickel on silicon for forming controllable nickel silicide | Oct 13, 2010 | Issued |
Array
(
[id] => 10189760
[patent_doc_number] => 09219191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-22
[patent_title] => 'Tuneable quantum light source'
[patent_app_type] => utility
[patent_app_number] => 12/903490
[patent_app_country] => US
[patent_app_date] => 2010-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 19
[patent_no_of_words] => 8259
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12903490
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/903490 | Tuneable quantum light source | Oct 12, 2010 | Issued |
Array
(
[id] => 6120882
[patent_doc_number] => 20110084383
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/903403
[patent_app_country] => US
[patent_app_date] => 2010-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 6296
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20110084383.pdf
[firstpage_image] =>[orig_patent_app_number] => 12903403
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/903403 | Semiconductor device and manufacturing method thereof | Oct 12, 2010 | Issued |
Array
(
[id] => 6120982
[patent_doc_number] => 20110084413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'THERMOSETTING DIE-BONDING FILM'
[patent_app_type] => utility
[patent_app_number] => 12/903498
[patent_app_country] => US
[patent_app_date] => 2010-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 13679
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20110084413.pdf
[firstpage_image] =>[orig_patent_app_number] => 12903498
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/903498 | THERMOSETTING DIE-BONDING FILM | Oct 12, 2010 | Abandoned |
Array
(
[id] => 9184325
[patent_doc_number] => 08624262
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Light emitting diode'
[patent_app_type] => utility
[patent_app_number] => 12/903852
[patent_app_country] => US
[patent_app_date] => 2010-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2840
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12903852
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/903852 | Light emitting diode | Oct 12, 2010 | Issued |
Array
(
[id] => 6120870
[patent_doc_number] => 20110084376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'MODULAR LOW STRESS PACKAGE TECHNOLOGY'
[patent_app_type] => utility
[patent_app_number] => 12/903752
[patent_app_country] => US
[patent_app_date] => 2010-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 9410
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20110084376.pdf
[firstpage_image] =>[orig_patent_app_number] => 12903752
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/903752 | Modular low stress package technology | Oct 12, 2010 | Issued |
Array
(
[id] => 5993141
[patent_doc_number] => 20110014794
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-20
[patent_title] => 'DEVICE MADE OF SINGLE-CRYSTAL SILICON'
[patent_app_type] => utility
[patent_app_number] => 12/892008
[patent_app_country] => US
[patent_app_date] => 2010-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2851
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20110014794.pdf
[firstpage_image] =>[orig_patent_app_number] => 12892008
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/892008 | Device made of single-crystal silicon | Sep 27, 2010 | Issued |
Array
(
[id] => 8274863
[patent_doc_number] => 20120168737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'ORGANIC LIGHT-EMITTING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/395875
[patent_app_country] => US
[patent_app_date] => 2010-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 13937
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13395875
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/395875 | Organic light-emitting device | Sep 20, 2010 | Issued |