Search

Valerie N. Newton

Examiner (ID: 2467, Phone: (571)270-5015 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2829, 2823, 4122
Total Applications
1018
Issued Applications
802
Pending Applications
97
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5364876 [patent_doc_number] => 20090302435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Semiconductor Device and Method of Shielding Semiconductor Die from Inter-Device Interference' [patent_app_type] => utility [patent_app_number] => 12/133216 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7882 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302435.pdf [firstpage_image] =>[orig_patent_app_number] => 12133216 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/133216
Semiconductor device and method of shielding semiconductor die from inter-device interference Jun 3, 2008 Issued
Array ( [id] => 5391788 [patent_doc_number] => 20090209101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'RUTHENIUM ALLOY FILM FOR COPPER INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 12/129345 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16361 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20090209101.pdf [firstpage_image] =>[orig_patent_app_number] => 12129345 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/129345
Ruthenium alloy film for copper interconnects May 28, 2008 Issued
Array ( [id] => 7527360 [patent_doc_number] => 08043952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same' [patent_app_type] => utility [patent_app_number] => 12/153655 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5633 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/043/08043952.pdf [firstpage_image] =>[orig_patent_app_number] => 12153655 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153655
Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same May 21, 2008 Issued
Array ( [id] => 5490469 [patent_doc_number] => 20090291540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'CMOS Process with Optimized PMOS and NMOS Transistor Devices' [patent_app_type] => utility [patent_app_number] => 12/125855 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20090291540.pdf [firstpage_image] =>[orig_patent_app_number] => 12125855 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125855
CMOS process with optimized PMOS and NMOS transistor devices May 21, 2008 Issued
Array ( [id] => 4723979 [patent_doc_number] => 20080203520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Isolation structure for semiconductor integrated circuit substrate' [patent_app_type] => utility [patent_app_number] => 12/150732 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5087 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203520.pdf [firstpage_image] =>[orig_patent_app_number] => 12150732 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150732
Isolation structure for semiconductor integrated circuit substrate Apr 29, 2008 Issued
Array ( [id] => 6220928 [patent_doc_number] => 20100055864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Method of forming isolation structure for semiconductor integrated circuit substrate' [patent_app_type] => utility [patent_app_number] => 12/150727 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5087 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20100055864.pdf [firstpage_image] =>[orig_patent_app_number] => 12150727 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150727
Method of forming isolation structure for semiconductor integrated circuit substrate Apr 29, 2008 Issued
Array ( [id] => 5379813 [patent_doc_number] => 20090191652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'Pixel structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/081515 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 10479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20090191652.pdf [firstpage_image] =>[orig_patent_app_number] => 12081515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081515
Pixel structure and method for manufacturing the same Apr 16, 2008 Abandoned
Array ( [id] => 4515183 [patent_doc_number] => 07932186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Methods for fabricating an electronic device' [patent_app_type] => utility [patent_app_number] => 12/061866 [patent_app_country] => US [patent_app_date] => 2008-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932186.pdf [firstpage_image] =>[orig_patent_app_number] => 12061866 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/061866
Methods for fabricating an electronic device Apr 2, 2008 Issued
Array ( [id] => 5473786 [patent_doc_number] => 20090246952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'METHOD OF FORMING A COBALT METAL NITRIDE BARRIER FILM' [patent_app_type] => utility [patent_app_number] => 12/058595 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9372 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20090246952.pdf [firstpage_image] =>[orig_patent_app_number] => 12058595 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/058595
METHOD OF FORMING A COBALT METAL NITRIDE BARRIER FILM Mar 27, 2008 Abandoned
Array ( [id] => 5473808 [patent_doc_number] => 20090246974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'METHOD OF FORMING A STRESSED PASSIVATION FILM USING A MICROWAVE-ASSISTED OXIDATION PROCESS' [patent_app_type] => utility [patent_app_number] => 12/058585 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10844 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20090246974.pdf [firstpage_image] =>[orig_patent_app_number] => 12058585 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/058585
Method of forming a stressed passivation film using a microwave-assisted oxidation process Mar 27, 2008 Issued
Array ( [id] => 5508648 [patent_doc_number] => 20090081855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-26 [patent_title] => 'FABRICATION METHOD OF POLYSILICON LAYER' [patent_app_type] => utility [patent_app_number] => 12/053635 [patent_app_country] => US [patent_app_date] => 2008-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3517 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20090081855.pdf [firstpage_image] =>[orig_patent_app_number] => 12053635 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/053635
FABRICATION METHOD OF POLYSILICON LAYER Mar 23, 2008 Abandoned
Array ( [id] => 5536836 [patent_doc_number] => 20090218641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'PIEZOELECTRIC SUBSTRATE, FABRICATION AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 12/040249 [patent_app_country] => US [patent_app_date] => 2008-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3950 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20090218641.pdf [firstpage_image] =>[orig_patent_app_number] => 12040249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/040249
Piezoelectric substrate, fabrication and related methods Feb 28, 2008 Issued
Array ( [id] => 6070811 [patent_doc_number] => 20110045662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'LOW-TEMPERATURE FORMATION OF LAYERS OF POLYCRYSTALLINE SEMICONDUCTOR MATERIAL' [patent_app_type] => utility [patent_app_number] => 12/524151 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7086 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20110045662.pdf [firstpage_image] =>[orig_patent_app_number] => 12524151 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/524151
Low-temperature formation of layers of polycrystalline semiconductor material Feb 18, 2008 Issued
Array ( [id] => 159259 [patent_doc_number] => 07674723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Plasma immersion ion implantation using an electrode with edge-effect suppression by a downwardly curving edge' [patent_app_type] => utility [patent_app_number] => 12/069425 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2507 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/674/07674723.pdf [firstpage_image] =>[orig_patent_app_number] => 12069425 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/069425
Plasma immersion ion implantation using an electrode with edge-effect suppression by a downwardly curving edge Feb 5, 2008 Issued
Array ( [id] => 4955025 [patent_doc_number] => 20080188049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Methods of Manufacturing Non-Volatile Memory Devices Including Charge-Trapping Layers' [patent_app_type] => utility [patent_app_number] => 12/022735 [patent_app_country] => US [patent_app_date] => 2008-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6067 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20080188049.pdf [firstpage_image] =>[orig_patent_app_number] => 12022735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/022735
Methods of Manufacturing Non-Volatile Memory Devices Including Charge-Trapping Layers Jan 29, 2008 Abandoned
Array ( [id] => 5340616 [patent_doc_number] => 20090179266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'DEVICE STRUCTURES FOR A METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND METHODS OF FABRICATING SUCH DEVICE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/972941 [patent_app_country] => US [patent_app_date] => 2008-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4002 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179266.pdf [firstpage_image] =>[orig_patent_app_number] => 11972941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/972941
Device structures for a metal-oxide-semiconductor field effect transistor and methods of fabricating such device structures Jan 10, 2008 Issued
Array ( [id] => 4644364 [patent_doc_number] => 08021969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/966435 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5764 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/021/08021969.pdf [firstpage_image] =>[orig_patent_app_number] => 11966435 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/966435
Semiconductor device and method for fabricating the same Dec 27, 2007 Issued
Array ( [id] => 5546084 [patent_doc_number] => 20090155961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION' [patent_app_type] => utility [patent_app_number] => 11/957845 [patent_app_country] => US [patent_app_date] => 2007-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20090155961.pdf [firstpage_image] =>[orig_patent_app_number] => 11957845 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/957845
Integrated circuit package system with package integration Dec 16, 2007 Issued
Array ( [id] => 5546104 [patent_doc_number] => 20090155981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'METHOD AND APPARATUS FOR SINGULATING INTEGRATED CIRCUIT CHIPS' [patent_app_type] => utility [patent_app_number] => 11/955495 [patent_app_country] => US [patent_app_date] => 2007-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1877 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20090155981.pdf [firstpage_image] =>[orig_patent_app_number] => 11955495 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/955495
METHOD AND APPARATUS FOR SINGULATING INTEGRATED CIRCUIT CHIPS Dec 12, 2007 Abandoned
Array ( [id] => 5419677 [patent_doc_number] => 20090146131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'Integrated Circuit, and Method for Manufacturing an Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 11/951132 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9998 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146131.pdf [firstpage_image] =>[orig_patent_app_number] => 11951132 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/951132
Integrated Circuit, and Method for Manufacturing an Integrated Circuit Dec 4, 2007 Abandoned
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