Search

Valerie N. Newton

Examiner (ID: 2467, Phone: (571)270-5015 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2829, 2823, 4122
Total Applications
1018
Issued Applications
802
Pending Applications
97
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5180661 [patent_doc_number] => 20070052003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Method for producing a memory with high coupling ratio' [patent_app_type] => utility [patent_app_number] => 11/272685 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2028 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20070052003.pdf [firstpage_image] =>[orig_patent_app_number] => 11272685 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/272685
Method for producing a memory with high coupling ratio Nov 14, 2005 Abandoned
Array ( [id] => 5614007 [patent_doc_number] => 20060115935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Method of manufacturing semiconductor substrate and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/271856 [patent_app_country] => US [patent_app_date] => 2005-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5218 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20060115935.pdf [firstpage_image] =>[orig_patent_app_number] => 11271856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271856
Method of manufacturing semiconductor substrate and method of manufacturing semiconductor device Nov 13, 2005 Issued
Array ( [id] => 5916604 [patent_doc_number] => 20060237811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Non-destructive, in-line characterization of semiconductor materials' [patent_app_type] => utility [patent_app_number] => 11/271426 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20060237811.pdf [firstpage_image] =>[orig_patent_app_number] => 11271426 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271426
Non-destructive, in-line characterization of semiconductor materials Nov 9, 2005 Abandoned
Array ( [id] => 5613981 [patent_doc_number] => 20060115909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Method for manufacturing a resistively switching memory cell, manufactured memory cell, and memory device based thereon' [patent_app_type] => utility [patent_app_number] => 11/270835 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7465 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20060115909.pdf [firstpage_image] =>[orig_patent_app_number] => 11270835 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270835
Method for manufacturing a resistively switching memory cell, manufactured memory cell, and memory device based thereon Nov 9, 2005 Abandoned
Array ( [id] => 5865695 [patent_doc_number] => 20060099826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Method of forming an insulation film and semiconductor device having the insulation film' [patent_app_type] => utility [patent_app_number] => 11/268635 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4153 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20060099826.pdf [firstpage_image] =>[orig_patent_app_number] => 11268635 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268635
Method of forming an insulation film and semiconductor device having the insulation film Nov 7, 2005 Abandoned
Array ( [id] => 5625449 [patent_doc_number] => 20060263954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Method of forming thin film transistor' [patent_app_type] => utility [patent_app_number] => 11/268935 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1361 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263954.pdf [firstpage_image] =>[orig_patent_app_number] => 11268935 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268935
Method of forming thin film transistor Nov 7, 2005 Abandoned
Array ( [id] => 314758 [patent_doc_number] => 07524728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Thin film transistor manufacturing method and organic electroluminescent display device' [patent_app_type] => utility [patent_app_number] => 11/267585 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2770 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/524/07524728.pdf [firstpage_image] =>[orig_patent_app_number] => 11267585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/267585
Thin film transistor manufacturing method and organic electroluminescent display device Nov 6, 2005 Issued
Array ( [id] => 7689330 [patent_doc_number] => 20070105368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Method of fabricating a microelectronic device using electron beam treatment to induce stress' [patent_app_type] => utility [patent_app_number] => 11/268036 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20070105368.pdf [firstpage_image] =>[orig_patent_app_number] => 11268036 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268036
Method of fabricating a microelectronic device using electron beam treatment to induce stress Nov 6, 2005 Abandoned
Array ( [id] => 5031681 [patent_doc_number] => 20070096220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'HDP/PECVD methods of fabricating stress nitride structures for field effect transistors, and field effect transistors so fabricated' [patent_app_type] => utility [patent_app_number] => 11/264865 [patent_app_country] => US [patent_app_date] => 2005-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3214 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096220.pdf [firstpage_image] =>[orig_patent_app_number] => 11264865 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/264865
HDP/PECVD methods of fabricating stress nitride structures for field effect transistors Nov 1, 2005 Issued
Array ( [id] => 5034868 [patent_doc_number] => 20070099407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Method for fabricating a transistor using a low temperature spike anneal' [patent_app_type] => utility [patent_app_number] => 11/264856 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4389 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20070099407.pdf [firstpage_image] =>[orig_patent_app_number] => 11264856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/264856
Method for fabricating a transistor using a low temperature spike anneal Oct 31, 2005 Abandoned
Array ( [id] => 5863127 [patent_doc_number] => 20060097257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Method of forming electrode for plasma display panel' [patent_app_type] => utility [patent_app_number] => 11/262935 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6790 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097257.pdf [firstpage_image] =>[orig_patent_app_number] => 11262935 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/262935
Method of forming electrode for plasma display panel Oct 31, 2005 Abandoned
Array ( [id] => 102039 [patent_doc_number] => 07727845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Ultra shallow junction formation by solid phase diffusion' [patent_app_type] => utility [patent_app_number] => 11/258469 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3129 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/727/07727845.pdf [firstpage_image] =>[orig_patent_app_number] => 11258469 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/258469
Ultra shallow junction formation by solid phase diffusion Oct 23, 2005 Issued
Array ( [id] => 5843674 [patent_doc_number] => 20060121745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Method for manufacturing display device' [patent_app_type] => utility [patent_app_number] => 11/244039 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 37162 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20060121745.pdf [firstpage_image] =>[orig_patent_app_number] => 11244039 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/244039
Method for manufacturing display device Oct 5, 2005 Issued
Array ( [id] => 4999884 [patent_doc_number] => 20070042518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'METHOD OF MANUFACTURING AN AMOLED' [patent_app_type] => utility [patent_app_number] => 11/161786 [patent_app_country] => US [patent_app_date] => 2005-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1645 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20070042518.pdf [firstpage_image] =>[orig_patent_app_number] => 11161786 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/161786
Method of manufacturing an AMOLED Aug 15, 2005 Issued
Array ( [id] => 151747 [patent_doc_number] => 07678713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Energy beam treatment to improve packaging reliability' [patent_app_type] => utility [patent_app_number] => 11/196985 [patent_app_country] => US [patent_app_date] => 2005-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3709 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/678/07678713.pdf [firstpage_image] =>[orig_patent_app_number] => 11196985 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/196985
Energy beam treatment to improve packaging reliability Aug 3, 2005 Issued
Array ( [id] => 5878020 [patent_doc_number] => 20060027847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Ferroelectric memory and ferroelectric capacitor with Ir-alloy electrode or Ru-alloy electrode and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 11/193415 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8620 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027847.pdf [firstpage_image] =>[orig_patent_app_number] => 11193415 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/193415
Ferroelectric memory and ferroelectric capacitor with Ir-alloy electrode or Ru-alloy electrode and method of manufacturing same Jul 31, 2005 Issued
Array ( [id] => 5202371 [patent_doc_number] => 20070023850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Bonding surfaces together via plasma treatment on both surfaces with wet treatment on only one surface' [patent_app_type] => utility [patent_app_number] => 11/194036 [patent_app_country] => US [patent_app_date] => 2005-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2628 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20070023850.pdf [firstpage_image] =>[orig_patent_app_number] => 11194036 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194036
Bonding surfaces together via plasma treatment on both surfaces with wet treatment on only one surface Jul 29, 2005 Abandoned
Array ( [id] => 5113084 [patent_doc_number] => 20070196999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Method For Manufacturing Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/632048 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 24712 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20070196999.pdf [firstpage_image] =>[orig_patent_app_number] => 11632048 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/632048
Method for manufacturing semiconductor device Jul 27, 2005 Issued
Array ( [id] => 5239723 [patent_doc_number] => 20070018214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Magnesium titanium oxide films' [patent_app_type] => utility [patent_app_number] => 11/189075 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10424 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018214.pdf [firstpage_image] =>[orig_patent_app_number] => 11189075 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/189075
Magnesium titanium oxide films Jul 24, 2005 Abandoned
Array ( [id] => 7229587 [patent_doc_number] => 20050255612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Method of attaching a leadframe to singulated semiconductor dice' [patent_app_type] => utility [patent_app_number] => 11/188156 [patent_app_country] => US [patent_app_date] => 2005-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3585 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20050255612.pdf [firstpage_image] =>[orig_patent_app_number] => 11188156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188156
Method of attaching a leadframe to singulated semiconductor dice Jul 21, 2005 Abandoned
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