Search

Vernon P. Webb

Examiner (ID: 6150)

Most Active Art Unit
2811
Art Unit(s)
2811, OPAP
Total Applications
440
Issued Applications
300
Pending Applications
1
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11246633 [patent_doc_number] => 09472684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Lateral GaN JFET with vertical drift region' [patent_app_type] => utility [patent_app_number] => 13/675826 [patent_app_country] => US [patent_app_date] => 2012-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5714 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13675826 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/675826
Lateral GaN JFET with vertical drift region Nov 12, 2012 Issued
Array ( [id] => 9474331 [patent_doc_number] => 20140131794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'Innovative Approach of 4F² Driver Formation for High-Density RRAM and MRAM' [patent_app_type] => utility [patent_app_number] => 13/674204 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674204
Innovative approach of 4F2 driver formation for high-density RRAM and MRAM Nov 11, 2012 Issued
Array ( [id] => 9474341 [patent_doc_number] => 20140131804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/674103 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2971 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674103
SEMICONDUCTOR STRUCTURE Nov 11, 2012 Abandoned
Array ( [id] => 8973655 [patent_doc_number] => 20130207085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/674697 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6244 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674697
ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME Nov 11, 2012 Abandoned
Array ( [id] => 9474368 [patent_doc_number] => 20140131831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'INTEGRATED CIRUIT INCLUDING AN FIN-BASED DIODE AND METHODS OF ITS FABRICATION' [patent_app_type] => utility [patent_app_number] => 13/674311 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2250 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674311 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674311
INTEGRATED CIRUIT INCLUDING AN FIN-BASED DIODE AND METHODS OF ITS FABRICATION Nov 11, 2012 Abandoned
Array ( [id] => 8987116 [patent_doc_number] => 20130214397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'MULTILAYER WIRING BOARD AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/674138 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5686 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674138 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674138
MULTILAYER WIRING BOARD AND ELECTRONIC DEVICE Nov 11, 2012 Abandoned
Array ( [id] => 9334936 [patent_doc_number] => 20140061718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'INSULATED GATE BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/674628 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3869 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674628 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674628
INSULATED GATE BIPOLAR TRANSISTOR Nov 11, 2012 Abandoned
Array ( [id] => 10195942 [patent_doc_number] => 09224857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Semiconductor structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/674146 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2857 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674146 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674146
Semiconductor structure and method for manufacturing the same Nov 11, 2012 Issued
Array ( [id] => 9051402 [patent_doc_number] => 20130249116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'MICROELECTRONIC PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/661927 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 16228 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661927
Microelectronic package Oct 25, 2012 Issued
Array ( [id] => 8582938 [patent_doc_number] => 20130001759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/614555 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6773 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614555 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/614555
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Sep 12, 2012 Abandoned
Array ( [id] => 10041951 [patent_doc_number] => 09082663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/608042 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 35 [patent_no_of_words] => 21290 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608042 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608042
Semiconductor device and manufacturing method thereof Sep 9, 2012 Issued
Array ( [id] => 8730161 [patent_doc_number] => 20130075730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'VERTICAL PNP DEVICE IN A SILICON-GERMANIUM BICMOS PROCESS AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/608545 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5183 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608545 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608545
VERTICAL PNP DEVICE IN A SILICON-GERMANIUM BICMOS PROCESS AND MANUFACTURING METHOD THEREOF Sep 9, 2012 Abandoned
Array ( [id] => 8566621 [patent_doc_number] => 20120329193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'GRAPHENE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/605107 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1904 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13605107 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/605107
Graphene sensor Sep 5, 2012 Issued
Array ( [id] => 9649116 [patent_doc_number] => 08803131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Metal-free integrated circuits comprising graphene and carbon nanotubes' [patent_app_type] => utility [patent_app_number] => 13/604254 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 2074 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604254
Metal-free integrated circuits comprising graphene and carbon nanotubes Sep 4, 2012 Issued
Array ( [id] => 10329093 [patent_doc_number] => 20150214097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION' [patent_app_type] => utility [patent_app_number] => 14/413966 [patent_app_country] => US [patent_app_date] => 2012-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3390 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14413966 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/413966
METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION Aug 2, 2012 Abandoned
Array ( [id] => 8943982 [patent_doc_number] => 08497160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'Method for making solder-top enhanced semiconductor device of low parasitic packaging impedance' [patent_app_type] => utility [patent_app_number] => 13/560786 [patent_app_country] => US [patent_app_date] => 2012-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5332 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560786 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/560786
Method for making solder-top enhanced semiconductor device of low parasitic packaging impedance Jul 26, 2012 Issued
Array ( [id] => 8477292 [patent_doc_number] => 20120276700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'READ-ONLY MEMORY AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/549525 [patent_app_country] => US [patent_app_date] => 2012-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5862 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/549525
Method of manufacturing a read-only memory device with contacts formed therein Jul 15, 2012 Issued
Array ( [id] => 8652947 [patent_doc_number] => 08372693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Semiconductor device including semiconductor chips with different thickness' [patent_app_type] => utility [patent_app_number] => 13/538654 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4127 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538654 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538654
Semiconductor device including semiconductor chips with different thickness Jun 28, 2012 Issued
Array ( [id] => 8749890 [patent_doc_number] => 08415723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Spacer structure wherein carbon-containing oxide film formed within' [patent_app_type] => utility [patent_app_number] => 13/490482 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/490482
Spacer structure wherein carbon-containing oxide film formed within Jun 6, 2012 Issued
Array ( [id] => 9468844 [patent_doc_number] => 08722473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Semiconductor devices and methods of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/451183 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9683 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/451183
Semiconductor devices and methods of manufacture thereof Apr 18, 2012 Issued
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