Search

Vicki B. Booker

Examiner (ID: 13967, Phone: (571)270-1565 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2821, 2813, 2893
Total Applications
782
Issued Applications
655
Pending Applications
6
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10590655 [patent_doc_number] => 09312276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Method for manufacturing array substrate' [patent_app_type] => utility [patent_app_number] => 14/374254 [patent_app_country] => US [patent_app_date] => 2014-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3338 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14374254 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/374254
Method for manufacturing array substrate Apr 16, 2014 Issued
Array ( [id] => 10590728 [patent_doc_number] => 09312350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/248727 [patent_app_country] => US [patent_app_date] => 2014-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 46 [patent_no_of_words] => 10568 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14248727 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/248727
Semiconductor device and manufacturing method thereof Apr 8, 2014 Issued
Array ( [id] => 10624693 [patent_doc_number] => 09343643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Light emitting device' [patent_app_type] => utility [patent_app_number] => 14/247891 [patent_app_country] => US [patent_app_date] => 2014-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 8461 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14247891 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/247891
Light emitting device Apr 7, 2014 Issued
Array ( [id] => 11333863 [patent_doc_number] => 09525116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Supporting member and light emitting device using the supporting member' [patent_app_type] => utility [patent_app_number] => 14/243690 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8155 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243690 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243690
Supporting member and light emitting device using the supporting member Apr 1, 2014 Issued
Array ( [id] => 9616326 [patent_doc_number] => 20140206183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'Semiconductor Constructions, Methods Of Forming Transistor Gates, And Methods Of Forming NAND Cell Units' [patent_app_type] => utility [patent_app_number] => 14/225053 [patent_app_country] => US [patent_app_date] => 2014-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4838 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225053 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225053
Methods of forming transistor gates Mar 24, 2014 Issued
Array ( [id] => 10189747 [patent_doc_number] => 09219178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Method to fabricate collimator structures on a direct conversion semiconductor X-ray detector' [patent_app_type] => utility [patent_app_number] => 14/222226 [patent_app_country] => US [patent_app_date] => 2014-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 29 [patent_no_of_words] => 3058 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14222226 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/222226
Method to fabricate collimator structures on a direct conversion semiconductor X-ray detector Mar 20, 2014 Issued
Array ( [id] => 9850128 [patent_doc_number] => 08951856 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-10 [patent_title] => 'Low-noise, high-gain semiconductor device incorporating BCD (Bipolar-CMOS-DMOS) technology and process of making the same' [patent_app_type] => utility [patent_app_number] => 14/190164 [patent_app_country] => US [patent_app_date] => 2014-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4290 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14190164 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/190164
Low-noise, high-gain semiconductor device incorporating BCD (Bipolar-CMOS-DMOS) technology and process of making the same Feb 25, 2014 Issued
Array ( [id] => 10919860 [patent_doc_number] => 20140322880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'METAL OXIDE SEMICONDUCTOR HAVING EPITAXIAL SOURCE DRAIN REGIONS AND A METHOD OF MANUFACTURING SAME USING DUMMY GATE PROCESS' [patent_app_type] => utility [patent_app_number] => 14/177705 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 21567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177705 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177705
Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy gate process Feb 10, 2014 Issued
Array ( [id] => 10016316 [patent_doc_number] => 09059339 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-16 [patent_title] => 'Light emitting diodes with via contact scheme' [patent_app_type] => utility [patent_app_number] => 14/177344 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177344
Light emitting diodes with via contact scheme Feb 10, 2014 Issued
Array ( [id] => 9613479 [patent_doc_number] => 20140203336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'ADHESION LAYER AND MULTIPHASE ULTRA-LOW k DIELECTRIC MATERIAL' [patent_app_type] => utility [patent_app_number] => 14/164555 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14164555 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/164555
ADHESION LAYER AND MULTIPHASE ULTRA-LOW k DIELECTRIC MATERIAL Jan 26, 2014 Abandoned
Array ( [id] => 10544452 [patent_doc_number] => 09269585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Method for cleaning metal gate surface' [patent_app_type] => utility [patent_app_number] => 14/152497 [patent_app_country] => US [patent_app_date] => 2014-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14152497 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/152497
Method for cleaning metal gate surface Jan 9, 2014 Issued
Array ( [id] => 10100005 [patent_doc_number] => 09136324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Power semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/138940 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10097 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14138940 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/138940
Power semiconductor device and method for manufacturing the same Dec 22, 2013 Issued
Array ( [id] => 9594588 [patent_doc_number] => 20140191265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'LIGHT EMITTING DEVICES WITH IMPROVED LIGHT EXTRACTION EFFICIENCY' [patent_app_type] => utility [patent_app_number] => 14/136171 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7470 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14136171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/136171
Light emitting devices with optical elements and bonding layers Dec 19, 2013 Issued
Array ( [id] => 9944769 [patent_doc_number] => 08994070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Reduction of edge effects from aspect ratio trapping' [patent_app_type] => utility [patent_app_number] => 14/109414 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 6388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109414 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/109414
Reduction of edge effects from aspect ratio trapping Dec 16, 2013 Issued
Array ( [id] => 9380943 [patent_doc_number] => 20140084424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'Semiconductor Device with Protective Structure Around Semiconductor Die for Localized Planarization of Insulating Layer' [patent_app_type] => utility [patent_app_number] => 14/090036 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5561 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14090036 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/090036
Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer Nov 25, 2013 Issued
Array ( [id] => 10645616 [patent_doc_number] => 09362495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Confined resistance variable memory cells and methods' [patent_app_type] => utility [patent_app_number] => 14/083069 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3875 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083069 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/083069
Confined resistance variable memory cells and methods Nov 17, 2013 Issued
Array ( [id] => 11753369 [patent_doc_number] => 09711388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Substrate holder and a device and a method for treating substrates' [patent_app_type] => utility [patent_app_number] => 14/441524 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6245 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14441524 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/441524
Substrate holder and a device and a method for treating substrates Nov 10, 2013 Issued
Array ( [id] => 10409942 [patent_doc_number] => 20150294951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'METHOD FOR BONDING BARE CHIP DIES' [patent_app_type] => utility [patent_app_number] => 14/441714 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4691 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14441714 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/441714
Method for bonding bare chip dies Nov 7, 2013 Issued
Array ( [id] => 9978017 [patent_doc_number] => 09024329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-05 [patent_title] => 'Silicon carbide trench MOSFET having reduced on-resistance, increased dielectric withstand voltage, and reduced threshold voltage' [patent_app_type] => utility [patent_app_number] => 14/049810 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049810 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/049810
Silicon carbide trench MOSFET having reduced on-resistance, increased dielectric withstand voltage, and reduced threshold voltage Oct 8, 2013 Issued
Array ( [id] => 9534605 [patent_doc_number] => 20140159251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units' [patent_app_type] => utility [patent_app_number] => 14/038575 [patent_app_country] => US [patent_app_date] => 2013-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14273 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14038575 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/038575
Semiconductor device and method of forming low profile fan-out package with vertical interconnection units Sep 25, 2013 Issued
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