Search

Victor A. Mandala

Examiner (ID: 6003, Phone: (571)272-1918 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2826, 2899
Total Applications
2126
Issued Applications
1923
Pending Applications
101
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9682551 [patent_doc_number] => 20140239314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'PHOTOCOUPLER' [patent_app_type] => utility [patent_app_number] => 13/940179 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3002 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13940179 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/940179
Photocoupler Jul 10, 2013 Issued
Array ( [id] => 9220356 [patent_doc_number] => 20140015132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'Systems and Methods for Mechanical and Electrical Package Substrate Issue Mitigation' [patent_app_type] => utility [patent_app_number] => 13/939797 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939797 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939797
Systems and methods for mitigation of mechanical degradation in high performance electrical circuit packages Jul 10, 2013 Issued
Array ( [id] => 9802887 [patent_doc_number] => 20150014832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'Semiconductor Device Having Three Terminal Miniature Package' [patent_app_type] => utility [patent_app_number] => 13/939276 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3226 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939276 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939276
Semiconductor Device Having Three Terminal Miniature Package Jul 10, 2013 Abandoned
Array ( [id] => 9266681 [patent_doc_number] => 20140021597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'High Speed Signal Conditioning Package' [patent_app_type] => utility [patent_app_number] => 13/940121 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7386 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13940121 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/940121
High speed signal conditioning package Jul 10, 2013 Issued
Array ( [id] => 9220347 [patent_doc_number] => 20140015121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/939442 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11537 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939442 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939442
Wiring substrate and manufacturing method thereof Jul 10, 2013 Issued
Array ( [id] => 9291413 [patent_doc_number] => 20140035047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/939451 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15379 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939451
Power device integration on a common substrate Jul 10, 2013 Issued
Array ( [id] => 9682484 [patent_doc_number] => 20140239246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/939738 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939738
Semiconductor memory device having crossing interconnects separated by stacked films Jul 10, 2013 Issued
Array ( [id] => 9220204 [patent_doc_number] => 20140014979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/939955 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4444 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939955 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/939955
LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREFOR Jul 10, 2013 Abandoned
Array ( [id] => 10971820 [patent_doc_number] => 20140374855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'PRESSURE SENSOR AND METHOD OF PACKAGING SAME' [patent_app_type] => utility [patent_app_number] => 13/924633 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3225 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924633 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924633
PRESSURE SENSOR AND METHOD OF PACKAGING SAME Jun 23, 2013 Abandoned
Array ( [id] => 10971776 [patent_doc_number] => 20140374811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES AND RELATED SEMICONDUCTOR DEVICES AND STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/921509 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7765 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921509 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921509
Methods of forming semiconductor device structures, memory cells, and arrays Jun 18, 2013 Issued
Array ( [id] => 10964806 [patent_doc_number] => 20140367838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'LEADFRAME WITH LEAD OF VARYING THICKNESS' [patent_app_type] => utility [patent_app_number] => 13/918675 [patent_app_country] => US [patent_app_date] => 2013-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918675 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/918675
LEADFRAME WITH LEAD OF VARYING THICKNESS Jun 13, 2013 Abandoned
Array ( [id] => 9990158 [patent_doc_number] => 09035364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'Active device and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 13/875283 [patent_app_country] => US [patent_app_date] => 2013-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 6096 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13875283 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/875283
Active device and fabricating method thereof May 1, 2013 Issued
Array ( [id] => 10863827 [patent_doc_number] => 08889524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Substrate treating method, stack and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/874489 [patent_app_country] => US [patent_app_date] => 2013-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 10622 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13874489 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/874489
Substrate treating method, stack and semiconductor device Apr 30, 2013 Issued
Array ( [id] => 10106757 [patent_doc_number] => 09142540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Electrostatic discharge protection semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/873261 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7235 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873261 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873261
Electrostatic discharge protection semiconductor device Apr 29, 2013 Issued
Array ( [id] => 9515190 [patent_doc_number] => 20140151683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/873426 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873426 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873426
THIN FILM TRANSISTOR Apr 29, 2013 Abandoned
Array ( [id] => 9335043 [patent_doc_number] => 20140061825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'MICRO ELECTRO MECHANICAL SYSTEM(MEMS) ACOUSTIC SENSOR AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/873195 [patent_app_country] => US [patent_app_date] => 2013-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3402 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873195 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873195
MICRO ELECTRO MECHANICAL SYSTEM(MEMS) ACOUSTIC SENSOR AND FABRICATION METHOD THEREOF Apr 28, 2013 Abandoned
Array ( [id] => 9861908 [patent_doc_number] => 20150041925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'P TYPE MOSFET AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/385101 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14385101 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/385101
P type MOSFET Dec 6, 2012 Issued
Array ( [id] => 9818271 [patent_doc_number] => 08928057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Uniform finFET gate height' [patent_app_type] => utility [patent_app_number] => 13/689924 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 40 [patent_no_of_words] => 8061 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689924
Uniform finFET gate height Nov 29, 2012 Issued
Array ( [id] => 9515258 [patent_doc_number] => 20140151750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'HETEROJUNCTION BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/689838 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6503 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689838 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689838
Heterojunction bipolar transistor Nov 29, 2012 Issued
Array ( [id] => 9704548 [patent_doc_number] => 08829617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Uniform finFET gate height' [patent_app_type] => utility [patent_app_number] => 13/689948 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3962 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689948 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689948
Uniform finFET gate height Nov 29, 2012 Issued
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