Search

Victor V. Barzykin

Examiner (ID: 16311, Phone: (571)272-0508 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2822, 2821, 2893, 2817
Total Applications
518
Issued Applications
395
Pending Applications
63
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10971878 [patent_doc_number] => 20140374913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'CIRCUIT ARRANGEMENT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/925900 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8293 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925900 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925900
Circuit arrangement and method for manufacturing the same Jun 24, 2013 Issued
Array ( [id] => 10971880 [patent_doc_number] => 20140374915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'INTEGRATION OF OPTICAL COMPONENTS IN INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/925916 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925916
Integration of optical components in integrated circuits Jun 24, 2013 Issued
Array ( [id] => 9205465 [patent_doc_number] => 20140004642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'MANUFACTURING METHOD FOR ORGANIC ELECTROLUMINESCENCE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/924992 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10414 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924992 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924992
MANUFACTURING METHOD FOR ORGANIC ELECTROLUMINESCENCE DEVICE Jun 23, 2013 Abandoned
Array ( [id] => 9205523 [patent_doc_number] => 20140004700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'MANUFACTURING METHOD FOR A SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/925510 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4848 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925510 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925510
MANUFACTURING METHOD FOR A SEMICONDUCTOR APPARATUS Jun 23, 2013 Abandoned
Array ( [id] => 9888933 [patent_doc_number] => 08975187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Stress-controlled formation of tin hard mask' [patent_app_type] => utility [patent_app_number] => 13/925495 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925495
Stress-controlled formation of tin hard mask Jun 23, 2013 Issued
Array ( [id] => 10971856 [patent_doc_number] => 20140374891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'SEMICONDUCTOR DEVICE WITH HEAT SPREADER AND THERMAL SHEET' [patent_app_type] => utility [patent_app_number] => 13/924627 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924627 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924627
SEMICONDUCTOR DEVICE WITH HEAT SPREADER AND THERMAL SHEET Jun 23, 2013 Abandoned
Array ( [id] => 9958491 [patent_doc_number] => 09006700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Resistive memory with a stabilizer' [patent_app_type] => utility [patent_app_number] => 13/924734 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 2859 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924734
Resistive memory with a stabilizer Jun 23, 2013 Issued
Array ( [id] => 9205452 [patent_doc_number] => 20140004629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'METHOD FOR PROCESSING SILICON WAFER' [patent_app_type] => utility [patent_app_number] => 13/925364 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3973 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925364 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925364
Method for processing silicon wafer Jun 23, 2013 Issued
Array ( [id] => 9455684 [patent_doc_number] => 08716695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process' [patent_app_type] => utility [patent_app_number] => 13/923530 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 8974 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13923530 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/923530
Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process Jun 20, 2013 Issued
Array ( [id] => 10971732 [patent_doc_number] => 20140374766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'BI-DIRECTIONAL GALLIUM NITRIDE SWITCH WITH SELF-MANAGED SUBSTRATE BIAS' [patent_app_type] => utility [patent_app_number] => 13/922352 [patent_app_country] => US [patent_app_date] => 2013-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922352 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922352
BI-DIRECTIONAL GALLIUM NITRIDE SWITCH WITH SELF-MANAGED SUBSTRATE BIAS Jun 19, 2013 Abandoned
Array ( [id] => 10971887 [patent_doc_number] => 20140374922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'Alignment in the Packaging of Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 13/922130 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3044 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922130 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922130
Alignment in the packaging of integrated circuits Jun 18, 2013 Issued
Array ( [id] => 11681333 [patent_doc_number] => 09679868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Ball height control in bonding process' [patent_app_type] => utility [patent_app_number] => 13/922081 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922081 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922081
Ball height control in bonding process Jun 18, 2013 Issued
Array ( [id] => 10570287 [patent_doc_number] => 09293466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Embedded SRAM and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/922097 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 5173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922097 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922097
Embedded SRAM and methods of forming the same Jun 18, 2013 Issued
Array ( [id] => 10971651 [patent_doc_number] => 20140374686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'THERMAL-DISTURB MITIGATION IN DUAL-DECK CROSS-POINT MEMORIES' [patent_app_type] => utility [patent_app_number] => 13/921672 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921672 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921672
Thermal-disturb mitigation in dual-deck cross-point memories Jun 18, 2013 Issued
Array ( [id] => 9561335 [patent_doc_number] => 20140179048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'METHOD FOR PREPARING ABSORBING LAYER OF SOLAR CELL AND THERMAL TREATMENT DEVICE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/908256 [patent_app_country] => US [patent_app_date] => 2013-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3481 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13908256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/908256
METHOD FOR PREPARING ABSORBING LAYER OF SOLAR CELL AND THERMAL TREATMENT DEVICE THEREOF Jun 2, 2013 Abandoned
Array ( [id] => 11180833 [patent_doc_number] => 09412831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Manufacturing method for silicon carbide semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/391015 [patent_app_country] => US [patent_app_date] => 2013-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6089 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 458 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14391015 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/391015
Manufacturing method for silicon carbide semiconductor device May 15, 2013 Issued
Array ( [id] => 9449534 [patent_doc_number] => 20140120704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'METHOD FOR CRYSTALLIZING A SILICON SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/890476 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3086 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/890476
Method for crystallizing a silicon substrate May 8, 2013 Issued
Array ( [id] => 9850154 [patent_doc_number] => 08951882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Method of fabricating optoelectronic integrated circuit substrate' [patent_app_type] => utility [patent_app_number] => 13/868497 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 5306 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868497 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/868497
Method of fabricating optoelectronic integrated circuit substrate Apr 22, 2013 Issued
Array ( [id] => 9895561 [patent_doc_number] => 20150050761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'LIGHT EMITTING DIODES AND A METHOD OF PACKAGING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/394501 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4950 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14394501 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/394501
Light emitting diodes and a method of packaging the same Apr 18, 2013 Issued
Array ( [id] => 9384009 [patent_doc_number] => 20140087491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'WAFER LEVEL BONDING METHOD FOR FABRICATING WAFER LEVEL CAMERA LENSES' [patent_app_type] => utility [patent_app_number] => 13/865814 [patent_app_country] => US [patent_app_date] => 2013-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2586 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13865814 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/865814
Wafer level bonding method for fabricating wafer level camera lenses Apr 17, 2013 Issued
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