Search

Victoria Kathleen Hall

Examiner (ID: 2394, Phone: (571)270-7567 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2818
Total Applications
966
Issued Applications
768
Pending Applications
76
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17638272 [patent_doc_number] => 11349008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Negative capacitance transistor having a multilayer ferroelectric structure or a ferroelectric layer with a gradient doping profile [patent_app_type] => utility [patent_app_number] => 16/572257 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572257 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572257
Negative capacitance transistor having a multilayer ferroelectric structure or a ferroelectric layer with a gradient doping profile Sep 15, 2019 Issued
Array ( [id] => 17270561 [patent_doc_number] => 11195993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Encapsulation topography-assisted self-aligned MRAM top contact [patent_app_type] => utility [patent_app_number] => 16/572281 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4068 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572281 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572281
Encapsulation topography-assisted self-aligned MRAM top contact Sep 15, 2019 Issued
Array ( [id] => 16715624 [patent_doc_number] => 20210082771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => METHOD FOR FORMING ISOLATION STRUCTURE HAVING IMPROVED GAP-FILL CAPABILITY [patent_app_type] => utility [patent_app_number] => 16/572109 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572109
Method for forming isolation structure having improved gap-fill capability Sep 15, 2019 Issued
Array ( [id] => 16715899 [patent_doc_number] => 20210083046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR DEVICE WITH AIR GAP ON GATE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/572192 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572192 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572192
Semiconductor device with air gap on gate structure and method for forming the same Sep 15, 2019 Issued
Array ( [id] => 15351995 [patent_doc_number] => 20200013889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => HIGH VOLTAGE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/571291 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571291
High voltage semiconductor device Sep 15, 2019 Issued
Array ( [id] => 17137829 [patent_doc_number] => 11139397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Self-aligned metal compound layers for semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/572255 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572255
Self-aligned metal compound layers for semiconductor devices Sep 15, 2019 Issued
Array ( [id] => 15657539 [patent_doc_number] => 20200091300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => Transistor Device [patent_app_type] => utility [patent_app_number] => 16/572031 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572031
Transistor device Sep 15, 2019 Issued
Array ( [id] => 16715600 [patent_doc_number] => 20210082747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SKIP-VIA PROXIMITY INTERCONNECT [patent_app_type] => utility [patent_app_number] => 16/572045 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572045
Skip-via proximity interconnect Sep 15, 2019 Issued
Array ( [id] => 17787580 [patent_doc_number] => 11410714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Magnetoresistive memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/572329 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 66 [patent_no_of_words] => 12063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572329
Magnetoresistive memory device and manufacturing method thereof Sep 15, 2019 Issued
Array ( [id] => 15746025 [patent_doc_number] => 20200111902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/572116 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572116
Semiconductor device and method for manufacturing the same Sep 15, 2019 Issued
Array ( [id] => 16226563 [patent_doc_number] => 20200251680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => DISPLAY PANEL, DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/757081 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16757081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/757081
Display panel, display device and manufacturing method of display panel Sep 5, 2019 Issued
Array ( [id] => 17456320 [patent_doc_number] => 11271188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/614388 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5036 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16614388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/614388
Display panel and manufacturing method thereof Sep 4, 2019 Issued
Array ( [id] => 15717947 [patent_doc_number] => 20200105741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => HIGH VOLTAGE CASCODE HEMT DEVICE [patent_app_type] => utility [patent_app_number] => 16/534259 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534259 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534259
High voltage cascode HEMT device Aug 6, 2019 Issued
Array ( [id] => 15503675 [patent_doc_number] => 20200052026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => LENS LAYERS FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/534179 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534179 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534179
Lens layers for semiconductor devices Aug 6, 2019 Issued
Array ( [id] => 18249094 [patent_doc_number] => 11605693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Display apparatus having a bending area with differently shaped wirings [patent_app_type] => utility [patent_app_number] => 16/533951 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10432 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533951
Display apparatus having a bending area with differently shaped wirings Aug 6, 2019 Issued
Array ( [id] => 16944233 [patent_doc_number] => 11056484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Semiconductor device with multiple trench structures [patent_app_type] => utility [patent_app_number] => 16/533958 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5855 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533958 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533958
Semiconductor device with multiple trench structures Aug 6, 2019 Issued
Array ( [id] => 16625113 [patent_doc_number] => 20210043766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => STRUCTURE WITH COUNTER DOPING REGION BETWEEN N AND P WELLS UNDER GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/533835 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533835
STRUCTURE WITH COUNTER DOPING REGION BETWEEN N AND P WELLS UNDER GATE STRUCTURE Aug 6, 2019 Abandoned
Array ( [id] => 17439151 [patent_doc_number] => 11264492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => High electron mobility transistor and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/533812 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2684 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533812 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533812
High electron mobility transistor and method for fabricating the same Aug 6, 2019 Issued
Array ( [id] => 16803507 [patent_doc_number] => 10998464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Flip-chip light emitting diode, manufacturing method of flip-chip light emitting diode and display device including flip-chip light emitting diode [patent_app_type] => utility [patent_app_number] => 16/533925 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533925
Flip-chip light emitting diode, manufacturing method of flip-chip light emitting diode and display device including flip-chip light emitting diode Aug 6, 2019 Issued
Array ( [id] => 16707707 [patent_doc_number] => 10957651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Package level power gating [patent_app_type] => utility [patent_app_number] => 16/534017 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3304 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534017 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534017
Package level power gating Aug 6, 2019 Issued
Menu