
Viet David Pham
Examiner (ID: 7872, Phone: (571)270-5582 , Office: P/2699 )
| Most Active Art Unit | 2699 |
| Art Unit(s) | 2628, 2629, 2697, 2699 |
| Total Applications | 522 |
| Issued Applications | 367 |
| Pending Applications | 2 |
| Abandoned Applications | 157 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19964662
[patent_doc_number] => 12334177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 18/225916
[patent_app_country] => US
[patent_app_date] => 2023-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 42
[patent_no_of_words] => 5984
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225916
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/225916 | Semiconductor memory device | Jul 24, 2023 | Issued |
Array
(
[id] => 19573671
[patent_doc_number] => 20240377963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => SLOW PROGRAMMING ON WEAK WORD LINES OF A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/357737
[patent_app_country] => US
[patent_app_date] => 2023-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12343
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357737
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/357737 | Slow programming on weak word lines of a memory device | Jul 23, 2023 | Issued |
Array
(
[id] => 20331378
[patent_doc_number] => 12461653
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Fast look ahead read for non-volatile memory by removing pre-read redundancy
[patent_app_type] => utility
[patent_app_number] => 18/225320
[patent_app_country] => US
[patent_app_date] => 2023-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 34
[patent_no_of_words] => 13284
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225320
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/225320 | Fast look ahead read for non-volatile memory by removing pre-read redundancy | Jul 23, 2023 | Issued |
Array
(
[id] => 19191143
[patent_doc_number] => 20240170056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => Channel Circuit with Trained Neural Network Noise Mixture Estimator
[patent_app_type] => utility
[patent_app_number] => 18/354178
[patent_app_country] => US
[patent_app_date] => 2023-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10029
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354178
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/354178 | Channel circuit with trained neural network noise mixture estimator | Jul 17, 2023 | Issued |
Array
(
[id] => 20117427
[patent_doc_number] => 12367133
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Apparatuses and methods for training operations
[patent_app_type] => utility
[patent_app_number] => 18/353639
[patent_app_country] => US
[patent_app_date] => 2023-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4930
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353639
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/353639 | Apparatuses and methods for training operations | Jul 16, 2023 | Issued |
Array
(
[id] => 19972898
[patent_doc_number] => 12341523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Delay control circuit, semiconductor memory device, and delay control method
[patent_app_type] => utility
[patent_app_number] => 18/347935
[patent_app_country] => US
[patent_app_date] => 2023-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 3700
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347935
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/347935 | Delay control circuit, semiconductor memory device, and delay control method | Jul 5, 2023 | Issued |
Array
(
[id] => 18757637
[patent_doc_number] => 20230361100
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => MEMORY CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 18/346856
[patent_app_country] => US
[patent_app_date] => 2023-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346856
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/346856 | Memory circuits | Jul 4, 2023 | Issued |
Array
(
[id] => 20119756
[patent_doc_number] => 12369497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Magnetoresistive random access memory device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/216610
[patent_app_country] => US
[patent_app_date] => 2023-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1179
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216610
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/216610 | Magnetoresistive random access memory device and method for fabricating the same | Jun 29, 2023 | Issued |
Array
(
[id] => 19493355
[patent_doc_number] => 12112071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-08
[patent_title] => Nonvolatile memory device supporting high-efficiency I/O interface
[patent_app_type] => utility
[patent_app_number] => 18/217063
[patent_app_country] => US
[patent_app_date] => 2023-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 23086
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18217063
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/217063 | Nonvolatile memory device supporting high-efficiency I/O interface | Jun 29, 2023 | Issued |
Array
(
[id] => 20266810
[patent_doc_number] => 12437806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-07
[patent_title] => Semiconductor device and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 18/344058
[patent_app_country] => US
[patent_app_date] => 2023-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 2809
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344058
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/344058 | Semiconductor device and operating method thereof | Jun 28, 2023 | Issued |
Array
(
[id] => 18730131
[patent_doc_number] => 20230344429
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => SEMICONDUCTOR DEVICE RELATED TO CALIBRATING TERMINATION RESISTANCE
[patent_app_type] => utility
[patent_app_number] => 18/343537
[patent_app_country] => US
[patent_app_date] => 2023-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15182
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343537
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/343537 | Semiconductor device related to calibrating termination resistance | Jun 27, 2023 | Issued |
Array
(
[id] => 18728019
[patent_doc_number] => 20230342312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => STORAGE DEVICE AND COMPUTER DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/342252
[patent_app_country] => US
[patent_app_date] => 2023-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9993
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342252
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/342252 | STORAGE DEVICE AND COMPUTER DEVICE | Jun 26, 2023 | Abandoned |
Array
(
[id] => 19305231
[patent_doc_number] => 20240233811
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => BIT LINE SENSE AMPLIFIER OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/340216
[patent_app_country] => US
[patent_app_date] => 2023-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8699
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340216
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/340216 | Bit line sense amplifier of semiconductor memory device and semiconductor memory device having the same | Jun 22, 2023 | Issued |
Array
(
[id] => 19305231
[patent_doc_number] => 20240233811
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => BIT LINE SENSE AMPLIFIER OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/340216
[patent_app_country] => US
[patent_app_date] => 2023-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8699
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340216
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/340216 | Bit line sense amplifier of semiconductor memory device and semiconductor memory device having the same | Jun 22, 2023 | Issued |
Array
(
[id] => 19515426
[patent_doc_number] => 20240347112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => MEMORY PERFORMING RESET OPERATION AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/339069
[patent_app_country] => US
[patent_app_date] => 2023-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3355
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18339069
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/339069 | Memory performing reset operation and operating method thereof | Jun 20, 2023 | Issued |
Array
(
[id] => 20245928
[patent_doc_number] => 12426273
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Magnetoresistance memory device and method for manufacturing magnetoresistance memory device
[patent_app_type] => utility
[patent_app_number] => 18/337576
[patent_app_country] => US
[patent_app_date] => 2023-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 2247
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337576
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/337576 | Magnetoresistance memory device and method for manufacturing magnetoresistance memory device | Jun 19, 2023 | Issued |
Array
(
[id] => 19037821
[patent_doc_number] => 20240087636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => Dynamic Memory Operations
[patent_app_type] => utility
[patent_app_number] => 18/333135
[patent_app_country] => US
[patent_app_date] => 2023-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11199
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333135
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/333135 | Dynamic Memory Operations | Jun 11, 2023 | Pending |
Array
(
[id] => 19617256
[patent_doc_number] => 20240402936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => CLOCK CONTROL CIRCUIT, MEMORY STORAGE DEVICE AND CLOCK CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 18/332766
[patent_app_country] => US
[patent_app_date] => 2023-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5378
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332766
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/332766 | Clock control circuit, memory storage device and clock control method | Jun 11, 2023 | Issued |
Array
(
[id] => 19483737
[patent_doc_number] => 20240331779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/331937
[patent_app_country] => US
[patent_app_date] => 2023-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5150
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331937
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/331937 | Semiconductor device and operating method of semiconductor device | Jun 8, 2023 | Issued |
Array
(
[id] => 19085920
[patent_doc_number] => 20240112721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-04
[patent_title] => DOUBLE DATA RATE (DDR) MEMORY CONTROLLER APPARATUS AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/208050
[patent_app_country] => US
[patent_app_date] => 2023-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9579
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208050
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/208050 | Double data rate (DDR) memory controller apparatus and method | Jun 8, 2023 | Issued |